A model to explain forward bias capacitance-voltage measurements is presented and compared with experimental results. Forward bias capacitance-voltage measurements, with environment light, were performed in a sample containing CdSe ultra thin quantum wells periodically embedded on undoped epitaxially grown ZnSe on a semi-insulating GaAs(001) substrate. A Au Schottky contact and annealed Ti/Pt/Au ohmic contacts were deposited on the sample surface in a coplanar cylindrical geometry. Under this model both type of carriers are necessary to explain the capacitive (holes) and resistive (electrons) behaviors. The measurements are fitted following the presented model, reasonable agreement is obtained. The quality factor Q is calculated and it is found to be smaller than one, hence no correction is needed. The charge carrier density profile is done on the capacitance voltage measurement. The experiments indicate a periodic charge distribution in the samples attributed to charge captured in the ultra thin quantum wells.