Key Engineering Materials, ISSN: 1662-9795, Vol. 1024, pp 15-21

doi: 10.4028/p-2Bd9VO

© 2025 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2024-09-20

Revised:
2025-08-15

Accepted:
2025-08-15

Online:
2025-09-12

Optimization of Gate Oxide Screening Technology for Commercial SiC Discrete MOSFETs and Power Modules

The original version of this paper is available on https://www.scientific.net/KEM.1024.15.pdf

Limeng Shi , Michael Jin , Jiashu Qian , Monikuntala Bhattacharya , Shiva Houshmand , Hengyu Yu , Atsushi Shimbori , Marvin H. White , Anant K. Agarwal

Dept. of Electrical & Computer Eng., The Ohio State University, Columbus, OH, USA

Ford Motor Company, Dearborn, MI, USA

shi.1564@osu.edu, jin.845@osu.edu, qian.539@osu.edu, bhattacharya.119@osu.edu, ehoushmand.3@osu.edu, yu.3868@osu.edu, ashimbor@ford.com, white.1829@osu.edu, iagarwal.334@osu.edu

Keywords: Screening, Charge to Breakdown, Gate Leakage Current, Extrinsic Failure, Gate Oxide Lifetime.

Abstract

This study demonstrates a negative correlation between gate leakage current ( ) and time to breakdown ( ) of gate oxide in various commercial SiC discrete MOSFETs and power modules. SiC MOSFETs with higher leakage current at the same gate voltage exhibit lower oxide failure time in the constant-voltage Time-Dependent Dielectric Breakdown (TDDB) test. The novelty lies in the discovery that measured under conditions of either low gate voltage at RT or high at can be utilized to identify discrete devices or power modules with non-infant failures or lower intrinsic lifetime. Aggressive screening based on helps to reduce non-infant extrinsic failure probability and identify devices with more uniformity of intrinsic lifetime.

Introduction

The original version of this paper is available on https://www.scientific.net/KEM.1024.15.pdf

A significant challenge in the adoption of SiC MOSFETs for electric vehicle (EV) applications is the issue of gate oxide failure. In practical circuits, certain SiC MOSFETs exhibit early gate oxide breakdown, which is primarily attributed to the high extrinsic defect density inherent in these devices . Therefore, it is essential to implement a screening process to eliminate unreliable devices prior to deployment [3-5]. The conventional screening method involves applying high-voltage pulses to the gate electrode for a specified duration, followed by the removal of failed devices. However, manufacturers tend to employ conservative screening conditions to avoid compromising the performance of SiC MOSFETs [6-8]. The conventional screening process can basically remove infant failures, but some non-infant failures close to the intrinsic failure line still survive [9].

In this study, gate leakage current ( ) and gate oxide lifetime ( ) measurements are performed on a variety of commercial SiC discrete MOSFETs and power modules. The relationship between gate leakage current and oxide lifetime is analyzed using the charge-to-breakdown mechanism. Based on the measurement results, an optimized screening method is developed to eliminate extrinsic failure tails and identify devices with more consistent intrinsic lifetime characteristics. Furthermore, the effectiveness of the enhanced screening technique is validated.

Experimental

The original version of this paper is available on https://www.scientific.net/KEM.1024.15.pdf

Table 1 summarizes the relevant information for the commercial SiC discrete MOSFETs and power modules studied in this work. SiC devices with different gate structures and current ratings are selected for the investigation. Fig. 1 illustrates the test procedures for measuring gate leakage current and oxide lifetime in SiC planar 17 A discrete MOSFETs. Initially, is measured at room temperature (RT) with a gate voltage of 30 V , followed by the measurement at with a gate voltage of . Subsequently, a constant-voltage Time-Dependent Dielectric

Breakdown (TDDB) test is conducted at to determine the lifetime of the gate oxide. Depending on the parameter information of the SiC MOSFETs from different vendors, the measured voltages of and are adjusted accordingly.

The breakdown characteristics of the gate oxide are analyzed using the Fowler-Nordheim (FN) tunneling and charge-to-breakdown ( ) mechanisms [10-14], as described in Eq. 1-3. In addition, the oxide lifetimes obtained from the TDDB tests are plotted using Weibull distribution [15]. Based on the cumulative distribution function (see Eq. 4), the oxide lifetime with different failure rates can be calculated. The value of for devices that cannot reach is predicted from the fitted line of and .

Table 1. Commercial 1.2 kV SiC devices studied.

Type | Discrete Device | Discrete Device | Power Module | Discrete Device | Discrete Device
Current (A) | 17 | 115 | 450 | 11 | 17
Structure | Planar | Planar | Planar | Planar | Double-Trench
tox (nm) | ~38 | ~38 | ~38 | ~46 | ~55

Fig. 1. Test procedures for SiC planar 17 A discrete MOSFETs.

Results and Discussion

The original version of this paper is available on https://www.scientific.net/KEM.1024.15.pdf

Constant-voltage TDDB tests at are conducted on SiC discrete MOSFETs and power modules, as illustrated in Fig. 2. The results show that a small percentage of commercial devices still experience early oxide breakdown. Moreover, the oxide lifetime distributions for power modules and trench devices exhibit greater variability compared to planar devices. Therefore, it is necessary to optimize the screening technology to reduce the probability of early oxide breakdown and allow the remaining devices to have a high uniform intrinsic lifetime of gate oxide. Fig. 3 shows the test curves of gate leakage current for SiC planar 17 A discrete MOSFETs devices, from the beginning of the TDDB test until oxide breakdown. The charge-to-breakdown ( ) is calculated using the integration method. Fig. 4 illustrates the Weibull distributions of for both SiC planar and trench discrete MOSFETs. Although the oxide lifetime of trench devices is highly variable, the is uniformly distributed. This indicates that the gate oxide tends to break down when the total charge passing through it exceeds a certain threshold, and the charge-to-breakdown mechanism can be used to explain oxide intrinsic breakdown.

Fig. 2. Weibull distribution of measured oxide lifetimes for commercial SiC discrete MOSFETs and power modules.

Fig. 2. Weibull distribution of measured oxide lifetimes for commercial SiC discrete MOSFETs and power modules.

Fig. 3. Constant-voltage TDDB test curves for SiC planar 17 A discrete MOSFETs.

Fig. 3. Constant-voltage TDDB test curves for SiC planar 17 A discrete MOSFETs.

Fig. 4. Weibull distribution of extracted from constant-voltage TDDB.

Fig. 4. Weibull distribution of extracted from constant-voltage TDDB.

Fig. 5 illustrates the oxide lifetime at with failure rates of , and 10 ppm for SiC planar 17 A discrete MOSFETs, calculated from Weibull statistics. It can be seen that planar 17 A discrete device with less than cannot meet the lifetime requirement of 20 years under operational conditions. To establish the relationship between gate leakage current and oxide lifetime for SiC planar 17 A MOSFETs, is measured at both and . The measured values are correlated with the oxide lifetime at for each device, as depicted in Fig. 6 (a) and (b). Based on the negative correlation between and , SiC planar 17 A MOSFETs
with an greater than at , and at may exhibit a shorter lifetime than . It can also be found that devices with higher at also exhibit higher at high .

Fig. 5. Oxide lifetimes at with the failure rate of and 10 ppm for SiC planar 17 A discrete MOSFETs.

Fig. 5. Oxide lifetimes at with the failure rate of and 10 ppm for SiC planar 17 A discrete MOSFETs.

Fig. 6. Correlation between gate leakage current and oxide lifetime for SiC planar 17 A discrete MOSFETs: (a) at vs. oxide lifetime at . (b) at vs. oxide lifetime at .

Fig. 6. Correlation between gate leakage current and oxide lifetime for SiC planar 17 A discrete MOSFETs: (a) at vs. oxide lifetime at . (b) at vs. oxide lifetime at .

The same negative correlation is observed in other commercial devices, as shown in Fig. 7. Higher gate leakage current in SiC MOSFETs correlates with shorter oxide lifetime. According to recent studies, the charge-to-breakdown mechanism provides a reasonable explanation for intrinsic oxide breakdown. This mechanism suggests that a certain amount of charge must be transported before breakdown occurs. During the TDDB test, the gate leakage current primarily consists of electrons injected into the conduction band from SiC via FN tunneling. The FN tunneling current density can be expressed by Eq. 1, which shows that leakage current density depends on the oxide electric field ( ). Due to variations in fabrication, there are differences in effective oxide thickness ( ) between devices. A smaller results in a larger at the same gate voltage, leading to higher leakage current in devices. Since is a constant value, devices with higher leakage current will exhibit shorter lifetimes. Extrinsic breakdown can be described as defect-related breakdown. This breakdown is caused by irregularities in the , or the surface and interface roughness. The tiny distortions lead to thickness fluctuation. In this case, locally enhanced electric field near the steps accelerates oxide breakdown. Also, the enhanced electric field at the defect site can increase the locally leakage current. Based on the present results, not all devices with extrinsic failures have large
leakage current. The total leakage current may depend on the type of defect, the location of the defect and the defect density. The physical mechanism of extrinsic breakdown requires further study.

Fig. 7. Correlation between the gate leakage current and the oxide lifetime for SiC discrete MOSFETs and power modules.

Fig. 7. Correlation between the gate leakage current and the oxide lifetime for SiC discrete MOSFETs and power modules.

Based on the above test results and analysis. An optimized screening technique based on leakage current is proposed. This approach is to obtain by applying gate voltage and identify SiC MOSFETs with low oxide lifetime according to the value of . Generally, devices with higher at low voltage and RT also exhibit higher at elevated temperatures and voltages. However, high temperature and high voltage conditions are more effective in screening out devices prone to infant failures. Therefore, high temperature and high voltage conditions serve not only as a test for but also as a screening process for the devices. Previous studies have shown that during 100 ms screening at , the maximum acceptable oxide electric fields for SiC planar and trench MOSFETs, without causing negative threshold voltage shifts, are and , respectively [16,17].

To demonstrate the effectiveness of this method, two new batches of SiC MOSFETs with planar and trench gate structures are selected for screening and TDDB testing. Fig. 8 (a) and (b) show the gate leakage current under different stress conditions and the distribution for each SiC planar and trench MOSFET, respectively. As shown in Fig. 8 (a), there are five leaky SiC planar MOSFETs detected at and . Five leaky devices do not exhibit oxide failure after undergoing the test. Subsequently, the oxide lifetime is measured using the TDDB test. The results show that oxide failure time of these five devices is in the range of 1.7 and 10 hours, which is lower than the oxide lifetime of normal devices. Fig. 8 (b) shows the distribution of SiC trench MOSFETs at and . It can be observed that the gate oxide of one device fails under the stress of , which can be considered as an infant failure. The remaining SiC trench MOSFETs have a large variation in despite passing the test without breakdown. For trench devices with large oxide lifetime variation, a portion of the devices with exceeding a certain range can be removed, allowing the remaining devices to exhibit higher lifetime uniformity. It can be concluded that the screening method proposed in this paper considers SiC MOSFETs that exhibit higher at different oxide stress conditions as devices that will experience non-infant failure. By removing these devices, the failure probability is reduced. In addition, the process used to measure can also eliminate devices with infant failures.

Fig. 8. Gate leakage current under different stress conditions for:
(a) SiC planar 11 A discrete MOSFETs. (b) SiC trench discrete MOSFET.

Fig. 8. Gate leakage current under different stress conditions for: (a) SiC planar 11 A discrete MOSFETs. (b) SiC trench discrete MOSFET.

Summary

The original version of this paper is available on https://www.scientific.net/KEM.1024.15.pdf

This study proposes a screening method to reduce the probability of gate oxide failure in commercial SiC MOSFETs, based on the observed negative correlation between and . The results indicate that devices with higher tend to have shorter oxide failure times. By removing leaky SiC MOSFETs, the intrinsic oxide lifetime distribution of the remaining devices becomes more uniform. Additionally, measurements under high-temperature and high-voltage conditions help to identify and eliminate some infant failures.

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The original version of this paper is available on https://www.scientific.net/KEM.1024.15.pdf

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