Passivation cracking is one of the main failures of Integrated circuits (ICs). A major cause for these failures is due to the mismatch of Coefficients of Thermal Expansion (CTE), Young’s modulus, Poisson’s ratios of package materials. In this paper, in order to analysis the stress distribution around the passivation layer corner, the finite element simulations and simplified analytical solutions are both applied. Then the comparison of stress values is made between the FEM result and simplified analytical solution, which shows that there is a good agreement. Based on these analyses, a conclusion can be drawn out that the simplified analytical model can be used to analyze the maximum stress around the passivation layer corner fast when design a chip preliminarily.