Self-Turn-On Phenomenon of SiC MOSFETs by Fast Switching Operation

The effect of the contact resistance between the p-well and the source electrode of SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) on the self-turn-on phenomenon was investigated experimentally. It was found that the contact resistance significantly affects the self-turn-on in addition to the conventional self-turn-on owing to the parasitic capacitances. To simulate this phenomenon, a circuit model including the contact resistance, p-well sheet resistance, and p-well/n+ region diode was created, and the simulation results were compared with the measurement results. Consequently, by considering the contact resistance and the forward recovery effect in the diode characteristics, the gate-induced voltage was calculated, with the results close to those of the experiment. Thus, the influence of contact resistance and p-well/n+ diode effects are clearly very important when operating SiC MOSFETs at high switching speeds.


Introduction
Higher-switching-frequency operation of SiC metal-oxide-semiconductor field-effect-transistors (MOSFETs) would reduce the volume of such passive components as capacitors and inductances in power electronics systems to achieve higher power densities of the systems [1]. When such an operation is performed, the switching loss increases and the efficiency decreases. Increasing the switching speed and shortening the switching time at ON and OFF are effective for reducing the switching loss of SiC MOSFETs。.
However, the resulting sudden change in the drain-source voltage (dVds/dt) of the MOSFET causes a large induced voltage at the gate electrode (Vind.) because of the gate-drain capacitance (Cgd). Consequently, a self-turn-on phenomenon may occur [2]. Furthermore in the case of SiC MOSFETs, self-turn-on phenomena that cannot be explained by Cgd have been reported [3].
Therefore, experiments on the temperature dependence of the self-turn-on phenomenon and the effect of the contact resistance between the p-well and the source electrode were conducted. A mechanism for the self-turn-on phenomenon is proposed as a result of investigating the device physics of SiC MOSFETs. Figure 1 depicts the experimental configuration used to study the self-turn-on of SiC MOSFETs. The SiC MOSFET was placed in the lower arm and was kept off by applying a negative gate bias voltage (Vbias), which was lower than the threshold voltage of the MOSFET. A high voltage (VDS) was applied to the drain source electrode of the lower arm MOSFET by turning on the MOSFET of the upper arm. To control the applied dVds/dt of the lower arm MOSFET, the switching speed of the upper arm MOSFET was changed by the gate resistance (Rg (up)) of the upper arm.

Experimental Setup
To simplify the analysis of the voltage induced in the gate electrode and the self-turn-on phenomenon resulting from dVds/dt, the displacement current was prevented from flowing into the gate bias circuit. Therefore, the gate resistance (Rg(low)) was set to a value sufficiently larger than the impedance due to the input capacitance of the MOSFET.  The gate induced voltage (Vind.) by dVds/dt is defined as the deviation between the peak value and the initial value of Vgs, as shown in Fig. 2(a).
Self-turn-on was detected as follows. First, the gate bias voltage was set so that self-turn-on did not occur, and then the current flowing through the lower arm was measured while gradually increasing the bias voltage. When this current increased, it was determined that self-turn-on had occurred. The bias voltage at that time was defined as the self-turn-on prevention voltage (Vprv.).
In this experiment, planar 4H-SiC MOSFETs with a rated voltage of 1200 V and chip size of 0.03 cm2 were adopted.

Results and Discussion
In this section, the experimental results and the models that explain the results are described. Fig. 3 Dependence of Vprv. on measurement temperature at dVds/dt of approximately 20V/ns. Figure 3 shows the relationship between the Vprv. and measurement temperature. This experiment was performed under the condition of dVds/dt of approximately 20V/ns. As shown in Fig.3, the positive temperature dependence of Vprv. was observed.
The traditional self-turn-on phenomenon is thought occur via Cgd. However, the temperature dependence of Cgd and Cgs is not strong enough to explain the temperature dependence of Vprv in Figure 3. The self-turn-on phenomenon in this experiment is clearly another phenomenon.  Figure 4 shows the dVds/dt dependency of Vprv. using two samples. The experiments were conducted at 25 degrees Celsius. Sample A had a normal contact resistance (ρc) between the p-well and the source electrode, and sample B intentionally had a large ρc.
As shown in Fig. 4, the Vprv. of sample B was lower than that of sample A. Moreover, the dependence of Vprv. on dVds/dt was larger in sample B than in sample A. These experimental results show that the higher the contact resistance (ρc), the more likely the occurrence of the self-turn-on phenomenon.
It is well known that contact resistance increases as temperature decreases. Summarizing the results in Fig. 4, the phenomenon that Vprv. has positive temperature dependence, as shown in Fig. 3, and it is considered to be caused by the temperature dependence of the contact resistance.
To understand the mechanism of the dependence Vprv. on the temperature and contact resistance described in Figs. 3 and 4, the equivalent circuit model shown in Fig. 5 was developed. The model included each capacitive component (Cgs, Cgd, and Cds) of the MOSFET, the contact resistance ρc and sheet resistance (Rsh) of the p-well, including their temperature dependence [4], and the diode of the p-well and n+ region (p-well/n+ diode). In addition, the forward recovery characteristics was incorporated in the diode so that the transient characteristics could be simulated. The forward recovery characteristics were modeled by a series-connected variable resistor whose resistance changed according to the charge through the diode [5]. In the simulation, the measured Vds waveform was used as the drain voltage.
In the simulation, the experimental results of Vind. were compared with the simulation results. The simulation was performed using the three models: (I) a model that considered only Cgs , Cds and Cgd, (II) a model that included all the components described in Fig. 5 except for the forward recovery characteristics of the p-well/n+ diode, and (III) a model that included the forward recovery effect in the p-well/n+ diode. The features of the model are summarized in Table Ⅰ.
The parameters used in the simulation are listed in table 2. For Cds and Cgd, the drain voltage dependence was given by the following equation using the parameters in the table.
(1) Figure 6 shows the dependence of the measured and calculated values of Vind. of sample A on (a) dVds/dt at 25 degrees Celsius and (b) temperature at dVds/dt of approximately 20V/ns. Figure 6(a) shows the relationship between Vind. and dVds/dt. The red, blue, and white diamonds are the results of models Ⅰ, Ⅱ, and Ⅲ, respectively. The white circle represents the measurement results.
As shown in Fig. 6(a), the calculated Vind. of model Ⅰ shows a large deviation from the measured value and smaller dependence on dVds/dt. However, the results of model II show that Vind. is larger than that of model I and the difference from the measured value becomes small. This indicates that the potential fluctuation of the p-well caused by the displacement current flowing through the contact resistance and the sheet resistance affects Vind.. However, if dVds/dt is large, the difference from the measured Vind. becomes large. This is because the induced voltage of the p-well is limited by the builtin potential of p-well/n+ diode in model Ⅱ.
In model III, a transient high resistance was applied to the p-well/n+ diode to consider the forward recovery characteristics. Figure 6 shows that the Vind. values calculated using this model agreed well with the measured values, even at large dVds/dt values.
This indicates that the transient characteristics of the p-well/n+ diode are also important in the circuit analysis when the MOSFET is switched ON and OFF under the condition of a large dVds/dt. Figure 6(b) shows the measured and calculated temperature dependences of VInd.. The dVds/dt at this time is approximately 20V/ns. As shown in the figure, the measured (white circles) and calculated (white diamonds) values agree well, confirming the validity of this model.   dV ds /dt [V/ns] measurement model Ⅰ model Ⅱ model Ⅲ (a) (b)

Summary
The SiC MOSFET self-turn-on phenomenon dependency on dVds/dt, temperature, and contact resistance was measured when dVds/dt was applied. It was found that the self-turn-on prevention voltage (Vprv.) had a positive temperature dependence and was strongly influenced by contact resistance.
To simulate this phenomenon, a circuit model including contact resistance, p-well sheet resistance, and p-well/n+ region diodes was created and compared with the measured results. It was found that a closer calculation result to the experimental result could be obtained by considering the contact resistance and the forward recovery effect in the p-well/n+ region diode.
It was shown that the contact resistance and p-well/n+ diode characteristics are very important for the switching characteristics when SiC MOSFETs operate at a high switching speed.