Pulsed Forward Bias Body Diode Stress of 1700 V SiC MOSFETs with Individual Mapping of Basal Plane Dislocations

In this work, body diode stress has been carried out for 1700 V 25 mΩ planar SiC MOSFETs. The epitaxial wafers were mapped with Infra-Red photoluminescence (IR-PL) to determine and localize the exact number of basal plane dislocations present in the drift layers of each die. The SiC MOSFETs were then packaged in groups with individual BPD counts in different bins ranging from 0 up to more than 30 per device. Pulsed body diode measurements with high currents of 250-400 A (about 1000-1600 A/cm2) were then performed with electrical characterization before and after to check for drift in key electrical parameters. Significantly increased RDSon was found after high current stress from about 300 A for devices with BPDs. A physical analysis of the degraded devices by backside electroluminescence show the presence of several trapezoid-shaped patterns indicating the occurrence of bipolar degradation.


Introduction
Bipolar degradation by body diode stress [1] has mainly been studied in SiC MOSFETs for high voltages such as 3.3 kV where it has been found to cause significant RDSon increase for some devices [2][3]. For lower voltage classes like 1200 V, bipolar degradation is expected to have less influence because smaller chip areas will be affected by each stacking fault expansion event. Fig 1. shows drift on RDSon vs. average BPD per die for 1200 V 20 mΩ and 1700 V 25 mΩ SiC MOSFETs after body diode stress with a DC current of 15 A corresponding to a quite low current density of 60 A/cm 2 [4]. Here, devices without BPDs show no RDSon drift and the shift clearly increases with BPD count. Inspired by these results, a further analysis has been done in this work by stressing the body diode in pulsed mode with very high current densities of 1000-1600 A/cm 2 . Finally, devices with different percentage of RDSon drifts after high current stress were examined by backside electroluminescence to check for bipolar degradation. The BPDs in the epitaxial layers were detected using the IR-PL channel of a SICA88. To obtain a higher density of BPDs in production dies and gauge their effect layers wafers were also grown skipping the BPD converting layer. The exact dimensions and occurrence of each BPD was aligned to the final production die. From this various passing production die were inked into various bins/groups depending on the count of BPDs in each die. Fig. 2 shows the approach of testing the SiC MOSFETs. The samples were electrically characterized before and after stressing by using the Keysight's B1505A Power Device Analyzer. The measured parameters are VTH, IDSS, RDSon, VF, BVDS . The pulsed body diode stress was performed using a special surge current tester, which can provide currents well above 1kA and is limited only by the system voltage and the DUT voltage drop. The measurements were all performed at ambient temperature. Fig. 3 shows transient measured forward voltage drop VF and current ID during a typical almost square-shaped 50 µs ID pulse using a measurement frequency of 100 Hz. The tester uses an arbitrary voltage signal, which enables to create the desired current pulse shape. There is a moderate VF overshoot due to parasitic inductance, and VF thereafter shows a small gradual decrease that may be the result of an increasing carrier plasma level due to a temperature increase by self-heating. After the post-characterization of the samples, some of them were sent for a package lead-frame removal to enable back-sided electroluminescence analysis.  In the following analysis, results are presented for 1700V 25 mΩ SiC MOSFETs. There are six groups with different numbers of BPDs per device. Fig. 4 shows the drift in RDSon and VF vs. BPD count after 1 million pulses of body diode stress for different stress currents. The drift in RDSon and VF follow a similar trend with typical drift after body diode stress increasing with the BPD count, but also a significant sample to sample variation for each BPD count group. The large sample to sample variation and the significant RDSon shift that can occur for a sample with 1 BPD suggests that the observed RDSon shifts are not connected only to the individual BPD count in the epi-layer but may also be influenced by BPDs in the border region between substrate and epi (BPDs in this region cannot be detected in the UVPL analysis). The shifts in RDSon are most significant with the largest increase being close to 170 %. The RDSon shift vs. stress current for the devices with 1 BPD or more BPDs, illustrates the strong current acceleration of the RDSon shift, an effect which is expected since the carrier plasma level will depend on the current density. No significant shifts were found for other parameters such as threshold voltage and breakdown voltage.    6 shows Electroluminescence (EL) images captured from the backside for previously body diode stressed SiC MOSFETs during body diode forward bias with ISD=1 A and VGS=-4.5 V. EL patterns can be seen in parts of the chip area where lead frame and solder was removed by mechanical polishing. Triangularly shaped and trapezoidal shaped stacking faults can be observed and there is a clear trend between observed increase in RDSon of 4 %, 46 % and >100 % after body diode stress and total size of dark areas in EL. The same trend was observed also for the other body diode stressed samples in agreement with bipolar degradation causing creation and expansion of SSF (triangles and SSF bars). No specific features were seen in EL for samples with zero RDSon drift.

Simulation Analysis and Results
Forward conduction of the 1700 V SiC MOSFET body diode was simulated in Sentaurus using doping dependent carrier lifetime with τmax=100 ns in the n-epi and τmax=1 ns in the p-implanted and the n + substrate regions to match the measured and simulated forward voltage drop. The cross-section plot in Fig. 7 shows that the hole density in the n-epi region with 60 A/cm 2 (ISD=15 A) looks sufficiently large to cause propagation of a triangularly shaped Shockley-type stacking fault from a BPD in the n-epi, a result in line with the correlation between small RDSon increase and epi BPD count in Fig. 1. In case of the high current density of 1600 A/cm 2 (ISD=400 A) the hole density has increased more than 10x in the n-epi and has reached a level in the 10 16 cm -3 range in the border region between epi and substrate. The finding of large trapezoidal features in EL after body diode stress at this high current density is likely caused by bar-shaped Shockley-type stacking faults caused by carrier recombination in the epi-substrate border region where most BPDs are converted to threading edge dislocations [5]. Fig. 7. Simulated hole density in vertical cross-section with 60 A/cm 2 and 1600 A/cm 2 using VGS=-5 V.

Conclusion
In this paper, individual mapping of BPDs in SiC MOSFET dies was performed to enable correlation of RDSon drift after body diode stress with the number of BPDs in the devices.
From this analysis, there is a clear trend that the RDSon and VF drift after high current density body diode stress increases with the number of BPDs in a device. Also, by limiting the stress current densities as a function of the number of BPDs, increase of RDSon can be prevented or reduced to a very low level.
On the other hand, if the SiC MOSFETs with BPDs=0 are being stressed at extremely high current densities J>1600 A/cm 2 , a significant degradation of RDSon can still occur. Therefore, the maximum currents should be accordingly limited to prevent degradation. For devices with 0 BPDs 350A (J≈1450 A/cm 2 ) was observed as a threshold current to trigger bipolar significant RDSon drift and this threshold current density was found to decrease with the number of BPDs per die.