Materials Science Forum, ISSN: 1662-9752, Vol. 1157, pp 75-79

doi: 10.4028/p-g5fd2K

© 2025 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2024-09-20

Revised:
2025-08-15

Accepted:
2025-08-15

Online:
2025-09-05

High-Quality SiC Crystal Growth by Cooldown Rate Control at Cooling Stage

The original version of this paper is available on https://www.scientific.net/MSF.1157.75.pdf

Chae Young Lee , Su Ho Kim , Seung Jun Lee , Jong Hwi Park Jung Woo Choi , Hyong Suk Lee , Jung Gyu Kim , Kap Ryeol Ku , Ye Jin Choi and Won Jae Lee

Senic, 17-15, 4sandan 7-ro, Jiksan-eup, Seobuk-gu, Cheonan-si, Chungcheongnam-do, Korea

Department of Advanced Materials Engineering, Dong-Eui University, 176, Eomgwang-ro, Busanjin-gu, Busan, Korea

cylee@senic.co.kr, shkim@senic.co.kr, sjlee@senic.co.kr, djhpark@senic.co.kr, ejwchoi@senic.co.kr, hslee@senic.co.kr,

Keywords: 6-inch SiC growth, Physical vapor transport (PVT), High-quality, cooldown rate, cooling stage.

Abstract

Thermoelastic stress generated within SiC crystals during the cooling process can induce various types of dislocation defects. In this study, a newly designed cooling protocol was proposed to investigate the correlation between cooldown rate and defect formation in single crystals. Three distinct cooldown rates, , and less than , were applied to assess their impact on the development of thermoelastic stress and resulting crystal quality. Notable variations in ingot color and surface morphology were observed depending on the applied cooldown rate. Dislocation types, including basal plane dislocations (BPDs), threading edge dislocations (TEDs), and threading screw dislocations (TSDs), were quantified through etch pit density (EPD) measurements after molten KOH etching at for 14 minutes. The results indicate that higher cooldown rates led to an increase in BPD density due to enhanced plastic deformation, while lower cooldown rates resulted in higher TED and TSD densities, likely due to increased thermal stress. These findings demonstrate that precise control of the cooldown rate is critical for suppressing thermoelastic stress and minimizing defect densities in SiC crystal growth.

Introduction

The original version of this paper is available on https://www.scientific.net/MSF.1157.75.pdf

Defect reduction during the growth of 6-inch 4H-SiC single crystals remains a critical challenge for the fabrication of high-reliability SiC power devices. Among the various crystallographic defects introduced during physical vapor transport (PVT) growth, basal plane dislocations (BPDs) are of particular concern due to their detrimental impact on the performance and long-term reliability of SiC-based devices, including MOSFETs and JFETs [1, 2]. During the PVT growth, BPDs, which lie perpendicular to the c -axis of the SiC crystal, exhibit limited propagation into the grown crystal. In contrast, other crystallographic defects originating from the seed crystal such as threading edge dislocations (TEDs), threading screw dislocations (TSDs), and micropipes (MPs), readily propagate along the growth direction, thereby extending into the epitaxial layers.

The temperature gradients in both the radial and axial directions of the graphite crucible significantly influence the crystal quality and polytype stability during growth. Furthermore, thermoelastic stresses including plastic deformation and thermal stress within the grown crystal contribute to the formation of various dislocation defects during the cooling stage [ 3,4 ]. Therefore, precise control of the cooldown rate is essential for managing the density of BPDs. Understanding the relationship between the cooldown rate during the cooling stage and defect formation is essential for the growth of high-quality SiC single crystals [5, 6]. In this study, a newly designed growth process incorporating varied cooldown rates was proposed to enhance the crystalline quality of 4 H SiC single crystals.

Experiments

The original version of this paper is available on https://www.scientific.net/MSF.1157.75.pdf

single crystals were grown at temperatures ranging from 2300 to under a growth pressure of 20 Torr in and Ar atmospheres. Seed crystals were prepared using off-axis c-face substrates cut from the same ingot. In the heating stage, the growth temperature was stabilized within , and the growth pressure was precisely regulated in the range of Torr. A newly designed growth protocol incorporating different cooldown rates during the cooling stage was introduced. Three cooldown conditions were investigated: (1) a rapid cooldown rate of , (2) a moderate rate of , and (3) a slow rate of less than . Following the growth run, the 6 -inch wafers were processed using standard semiconductor fabrication techniques. The surface of the SiC substrates was etched in molten KOH at for 14 minutes to reveal crystallographic defects. Etch pit density (EPD) was evaluated using optical microscopy (OM) after the etching process.

Result and Discussion

The original version of this paper is available on https://www.scientific.net/MSF.1157.75.pdf

Dislocation defects such as TSDs and TEDs originating from the seed crystal may either diminish during growth or propagate into the grown SiC ingot. In particular, BPDs, which lie perpendicular to the c -axis of the SiC crystal, tend to increase due to plastic deformation induced during the cooling stage. An insufficient temperature gradient during this stage can exacerbate BPD formation by inducing simultaneous tensile and compressive stresses within the crystal. As shown in Fig. 1 (b), radial cracks were observed after external grinding in crystals grown under conventional cooldown conditions ( ) without pressure control during cooling. When the growth pressure is abruptly increased to atmospheric levels during the cooldown phase, convective heat transfer distorts the thermal gradient, further promoting defect generation. The pressure range during this transition spans from 20 Torr to atmospheric pressure.

Fig. 1. Photographic images of the SiC crystal grown under a conventional cooldown rate of , illustrating the surface condition before (a) and after (b) external grinding.

Fig. 1. Photographic images of the SiC crystal grown under a conventional cooldown rate of , illustrating the surface condition before (a) and after (b) external grinding.

Figure 2 denotes a schematic diagram of the SiC crystal growth process employed in this study. Prior to the pre-heating stage, a vacuum is applied to remove residual impurities from the growth chamber. The pressure is then restored to atmospheric levels for the subsequent heating process. This procedure is adopted to prevent seed crystal detachment and unintended sublimation that may occur if heating is initiated under vacuum conditions, which could compromise control over the initial temperature gradient, an essential factor for stable and reproducible crystal growth.

The region highlighted in light red indicates the cooling stage. Key parameters influenced during this stage include the cooldown rate, pressure control, type of inert gas, and material density. The growth temperature and pressure were kept constant across all growth runs, including the conventional process illustrated in Fig. 2. The newly developed cooldown protocol consists of three conditions: (1) a cooldown rate of , (2) , and (3) less than . In
the case of the conventional cooldown condition, a maximum cooldown rate of was achieved by optimizing the thickness and density of the graphite insulation.

Fig. 2. Schematic diagram of the SiC crystal growth process. The reddish-shaded region indicates the cooling stage, and the inset highlights the key parameters associated with this stage.

Fig. 2. Schematic diagram of the SiC crystal growth process. The reddish-shaded region indicates the cooling stage, and the inset highlights the key parameters associated with this stage.

Figure 3 shows images of SiC ingots grown under three different cooldown rates during the cooling stage: (a) , (b) , and (c) less than . Significant variations in color and surface morphology were observed depending on the applied cooling conditions. A horizontal crack was identified in the SiC ingot (Fig. 3 (a)) grown with a cooldown rate of following the external grinding process. In contrast, surface carbonization (Fig 3. (c)) was observed in the ingot grown under a cooldown rate of less than . The most uniform and smooth surface morphology (Fig. 3 (b)) was achieved with a cooldown rate of .

Fig. 3. Photographic images of SiC ingots grown under different cooldown rates: (a) , (b) , and (c) less than

Fig. 3. Photographic images of SiC ingots grown under different cooldown rates: (a) , (b) , and (c) less than

Figure 4. denotes optical microscopy (OM) images of the etched surfaces of three SiC substrates, BPDs, TSDs, TEDs, and overall etch pit density (EPD), prepared under different cooldown rates during the cooling stage. Under the relatively high cooldown rate condition of (a) , a significant increase in BPDs was observed, primarily attributed to plastic deformation during the cooling stage. In contrast, the extremely slow cooldown condition of (c) less than , resulted in elevated densities of TEDs and TSDs, likely due to increased thermal stress. Notably, the SiC crystal grown under a moderate cooldown rate of (b) , exhibited the lowest overall defect densities, including BPDs and TEDs, with comparatively fewer TSDs, indicating optimal thermal and mechanical stability during cooling as shown in Table. 1.

Although the cooldown rate of (equivalent to ), which resulted in low defect density in the present study, is comparable to the cooldown rate over 70 hours reported in a previous study [6], the outcomes differ significantly. This discrepancy is presumed to arise from differences in the density and thickness of the graphite insulations used in the two studies. As
summarized in Table 1, the defect densities of the SiC substrates were evaluated based on etch pit density (EPD) measurements. The EPD values for SiC crystals grown under cooldown rates of (a), (b), and less than (c) were , and , respectively.

Fig. 4. Optical microscopy (OM) images of the etched surfaces of three SiC substrates grown under different cooldown rates (a) , (b) , and (c) less than during the cooling stage, showing the distributions of BPDs, TSDs, and TEDs, respectively.

Fig. 4. Optical microscopy (OM) images of the etched surfaces of three SiC substrates grown under different cooldown rates (a) , (b) , and (c) less than during the cooling stage, showing the distributions of BPDs, TSDs, and TEDs, respectively.

Table 1. Obtained values of basal plane dislocations (BPDs), threading screw dislocations (TSDs), threading edge dislocations (TEDs), and overall etch pit density (EPD), prepared under different cooldown rates (a) ~ (c) during the cooling stage.

Defect density
Cooldown rate (a)
10~30 °C/min
Cooldown rate (b)
1~5 °C/min
Cooldown rate (c)
Less than1 °C/min

BPD [ea/cm²]
12,400
440
300

TSD [ea/cm²]
80
160
1,740

TED [ea/cm²]
1,680
1,200
14,460

Etch pit density
[ea/cm²]
14,160
1,800
16,500

Summary

The original version of this paper is available on https://www.scientific.net/MSF.1157.75.pdf

6-inch 4H-SiC single crystals were grown using the physical vapor transport (PVT) method under three different cooldown rates applied during the cooling stage. In crystals grown under the conventional cooldown condition ( ) without growth pressure control, radial cracks were observed after external grinding. The cooldown rate was found to have a significant influence on the color and surface morphology of the ingots. A relatively high cooldown rate resulted in an increased density of basal plane dislocations (BPDs), primarily due to enhanced plastic deformation. Conversely, extremely low cooldown rates led to a higher density of threading edge dislocations (TEDs) and threading screw dislocations (TSDs), likely caused by increased thermal stress. These results highlight the importance of precisely controlling the cooldown rate during the cooling stage to achieve high-quality SiC crystal growth.

Acknowledgements

The original version of this paper is available on https://www.scientific.net/MSF.1157.75.pdf

This work was supported by Technology Innovation Program (Project Number: 1415185945, Project Name: Development of next-generation power semiconductor based on Si -on-SiC structure), (Project Number: 00402234, Project Name: Development of highly flat, highly clean large area polished SiC single crystal wafers by utilizing advanced process technology for power semiconductor application) funded by the Ministry of Trade, Industry and Energy.

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The original version of this paper is available on https://www.scientific.net/MSF.1157.75.pdf

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