Design and Implementation of a S-Parameter Wafer Defect Scanner

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Periodical:

Materials Science Forum (Volumes 445-446)

Edited by:

Toshio Hyodo, Yoshinori Kobayashi, Yasuyuki Nagashima, Haruo Saito

Pages:

501-503

Citation:

P.S. Naik et al., "Design and Implementation of a S-Parameter Wafer Defect Scanner", Materials Science Forum, Vols. 445-446, pp. 501-503, 2004

Online since:

January 2004

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DOI: https://doi.org/10.1016/s0169-4332(99)00204-4

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DOI: https://doi.org/10.1007/978-3-662-03893-2_3

[6] S. Mantl, W Triftshäuser: Phys. Rev. B 17, (1978) 1645 (a) (b) Figure-3 : S-parameter image of GaAs wafer of size 3mmx3mm. (a) 128x128 pixels and (b) 64x64 pixels. TitlTitle of Publication (to be inserted by the publisher).

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