Fabrication and Electrical Transport Properties of CVD Grown Silicon Carbide Nanowires (SiC NWs) for Field Effect Transistor

Abstract:

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We demonstrate the fabrication and the electrical transport properties of single crystalline 3C silicon carbide nanowires (SiC NWs). The growth of SiC NWs was carried out in a chemical vapor deposition (CVD) furnace. Methyltrichlorosilane (MTS, CH3SiCl3) was chosen as a source precursor. SiC NWs had diameters of less than 100 nm and lengths of several μm. For electrical transport measurements, as-gown SiC NWs were prepared on a highly doped silicon wafer, pre-patterned by a photo-lithography process, with a 400 nm thick SiO2 layer. Source and drain electrodes were defined by e-beam lithography (EBL). Prior to the metal deposition (Ti/Au : 40 nm/70 nm) by thermal evaporation, the native oxide on SiC NWs was removed by buffered HF. The estimated mobility of carriers is 15 cm2/(Vs) for a source-drain voltage (VSD) of 0.02 V. It is very low compared to that expected in bulk and/or thin film 3C-SiC. The electrical measurements from nanowire-based field effect transistor (FET) structures illustrate that SiC NWs are weak n-type semiconductor. We have also demonstrated a powerful technique, a standard UV photo-lithography process, for fabrication of SiC nanowires instead of using EBL process.

Info:

Periodical:

Materials Science Forum (Volumes 527-529)

Edited by:

Robert P. Devaty, David J. Larkin and Stephen E. Saddow

Pages:

771-774

DOI:

10.4028/www.scientific.net/MSF.527-529.771

Citation:

H. K. Seong et al., "Fabrication and Electrical Transport Properties of CVD Grown Silicon Carbide Nanowires (SiC NWs) for Field Effect Transistor", Materials Science Forum, Vols. 527-529, pp. 771-774, 2006

Online since:

October 2006

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$35.00

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