Die Bonding Issues on Silicon Carbide Diodes
We report on the die bonding processes and how the surface roughness and metallization schemes affect the processes of die bonding in 4H-SiC device fabrication using a soldering test and die shear test (DST) with differently prepared 4H-SiC samples. The first set of samples (FZ#1 and FZ#2) was capped with sequentially evaporated Ti and Au on an annealed Ni layer. The second set of samples (FZ#3 and FZ#4) and the third set of samples (FZ#5 and FZ#6) were prepared by 4μm-thick Au electroplating on an annealed Ni layer and an un-annealed Ni layer, respectively. The quality of the soldering, such as the solder coverage, void, and adhesion, was characterized by optical microscope, X-ray microprobe, and DST. We found that the samples (FZ#4 and FZ#6) deposited by Au electroplating on C-face (bottom-side) 4H-SiC provided a satisfactory result for the tests of solder coverage, void, and DST and also realized the cleaning process prior to the electroplating and soldering was the most crucial in the die packaging processes of vertical structure devices. The void fraction measured by X-ray microprobe for the samples, FZ#4 and FZ#6 was 2.2% (average for 5 samples) and 0.8% (average for 3 samples), respectively.
Robert P. Devaty, David J. Larkin and Stephen E. Saddow
S. Y. Lee et al., "Die Bonding Issues on Silicon Carbide Diodes", Materials Science Forum, Vols. 527-529, pp. 875-878, 2006