Optimizing the Thermally Oxidized 4H-SiC MOS Interface for P-Channel Devices


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Optimization of the thermally oxidized 4H-SiC MOS interface has produced p-channel lateral MOSFETs with hole inversion layer mobility as high as 10 cm2/Vs. This has been accomplished by identifying the 1200oC Dry, 950oC Wet (un-nitrided) oxidation as ideal for hole conduction across the MOS inversion layer and by implant activation annealing at 1800oC of the heavily implanted n-type well. High temperature measurements show that the high mobility and normally-off operation is maintained throughout the operating temperature range. Oxide leakage measurements yield a dielectric strength of 8.5 MV/cm with 90% yield, thereby enabling the manufacture of high performance p-channel devices like the IGBT.



Materials Science Forum (Volumes 556-557)

Edited by:

N. Wright, C.M. Johnson, K. Vassilevski, I. Nikitina and A. Horsfall




M. K. Das et al., "Optimizing the Thermally Oxidized 4H-SiC MOS Interface for P-Channel Devices", Materials Science Forum, Vols. 556-557, pp. 667-670, 2007

Online since:

September 2007