Performance of Low Resistivity Electrode Prepared by Electroless Plated for Amorphous Silicon Thin-Film Transistors


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The TFTs array fabrication process for large-area TFT-LCD has been continuously developed for simplifying processing steps, improving performance and reducing cost in the process of mass production. In this study, the hydrogenated amorphous silicon (a-Si:H) TFTs with low resistivity electrodes , silver thin films, were prepared by using the selective deposition method that combined lift-off and electroless plated processes. This developed process can direct pattern the electrode of transistor devices without the etching process and provide ease processing steps. The as-deposited Ag films were annealed at 200 oC for 10 minutes under N2 atmosphere. The results shows that the adhesion properties can be enhanced and the resistivity has been improved from 6.0 μ,-cm, significantly decrease by 35%, of as-deposited Ag films by annealed. The thickness of Ag thin film is about 100 nm and the r. m. s roughness value is 1.54 nm. The a-Si:H TFT with Ag thin films as source and drain electrodes had a field effect mobility of 0.18 cm2/Vs, a threshold voltage of 2.65 V, and an on/off ratio of 3×104.



Materials Science Forum (Volumes 561-565)

Main Theme:

Edited by:

Young Won Chang, Nack J. Kim and Chong Soo Lee




C. Y. Tsay et al., "Performance of Low Resistivity Electrode Prepared by Electroless Plated for Amorphous Silicon Thin-Film Transistors", Materials Science Forum, Vols. 561-565, pp. 1165-1168, 2007

Online since:

October 2007




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DOI: 10.4324/9780203413265

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