Critical Issues for MOS Based Power Devices in 4H-SiC


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In this paper, we present the effects of MOS channel processing on the threshold voltage and the MOS field effect mobility of 4H-SiC MOSFETs. By increasing the p-well doping concentration by two orders of magnitude, the threshold voltage could be shifted positive from 0V to 5 V when a thermal oxide layer with NO post oxidation anneal was used as the gate dielectric layer. However, a severe degradation of MOS field effect mobility, decreasing from 37 cm2/Vs to 5 cm2/Vs, was also observed. Using a different processing technique, which uses a deposited oxide layer with an NO anneal, a threshold voltage of 7.5 V and a MOS field effect mobility of 15 cm2/Vs could be achieved. A 10 kV, 1 A power DMOSFET was demonstrated with this technique. A DMOSFET turn-off voltage of 5.25 V was measured at room temperature, which shifted to 3.0 V at 250oC, providing acceptable noise margins throughout the operating temperature range.



Materials Science Forum (Volumes 615-617)

Edited by:

Amador Pérez-Tomás, Philippe Godignon, Miquel Vellvehí and Pierre Brosselard






S. H. Ryu et al., "Critical Issues for MOS Based Power Devices in 4H-SiC", Materials Science Forum, Vols. 615-617, pp. 743-748, 2009

Online since:

March 2009




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