Growth of Wafer Size Graphene on SiC Substrates
Graphene, as strict two-dimensional material, exhibits exceptionally good electronic properties. In this paper, graphene was prepared on SiC substrates at different temperature based on two types of pre-treated surface. The surface morphology was characterized by atomic force microscopy (AFM) and scanning electronic microscopy (SEM). The results on SiC surface pre-treatment showed that chemical mechanical polishing (CMP) was an effective surface treatment method for reproducible and controlled growth of graphene. Images of the Si-surface revealed that the thickness of graphitic layers increased with annealing temperature. Meanwhile, a mesh-like network of wrinkles tended to tent-like features with the increase of temperature. The residual stresses, average crystallite size and number of graphene layers were analyzed by Raman spectroscopy. Little shift of 2D-band indicated the presence of certain stresses. Results among four samples showed that graphene layers grown on MP C-surface substrates had the thickest layers，contained the smallest average crystallite size La and exhibited no stresses. While graphene layers grown on Si-surface under 1600°C built upon compressive stresses, exhibited largest La and least number of graphene layers, indicating perfect quality.
Chengming Li, Chengbao Jiang, Zhiyong Zhong and Yichun Zhou
X. F. Chen et al., "Growth of Wafer Size Graphene on SiC Substrates", Materials Science Forum, Vol. 687, pp. 90-98, 2011