Impact of Hot Carrier Degradation and Positive Bias Temperature Stress on Lateral 4H-SiC nMOSFETs
We study the impact of positive bias temperature stress and hot carrier stress on lateral 4H-SiC nMOSFETs. These degradation mechanisms are prominent in silicon based devices where both create oxide as well as interface traps. For SiC MOSFETs only limited information regarding these mechanisms is available. We transfer the charge pumping technique, known from Si MOSFETs, reliably to SiC MOSFETs to learn about the nature of the stress induced defects.
Hajime Okumura, Hiroshi Harima, Prof. Tsunenobu Kimoto, Masahiro Yoshimoto, Heiji Watanabe, Tomoaki Hatayama, Hideharu Matsuura, Tsuyoshi Funaki and Yasuhisa Sano
G. Pobegen et al., "Impact of Hot Carrier Degradation and Positive Bias Temperature Stress on Lateral 4H-SiC nMOSFETs", Materials Science Forum, Vols. 778-780, pp. 959-962, 2014