Impact of Nitric Oxide Post Oxidation Anneal on the Bias Temperature Instability and the On-Resistance of 4H-SiC nMOSFETs

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We study the impact of different nitric oxide (NO) post oxidation annealing (POA) procedures on the on resistance Ron of n-channel MOSFETs and on the threshold voltage shift ∆Vth following positive bias temperature stress (PBTS). All samples were annealed in an NO containing atmosphere at various temperatures and times. A positive stress voltage of 30 V was chosen which corresponds to an electric field of about 4.3 MV/cm. The NO POA causes a decrease in overall ∆Vth for longer NO POA times and higher NO POA temperatures. As opposed to the change in ∆Vth, the device Ron increases with NO POA temperature and time.

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Periodical:

Materials Science Forum (Volumes 821-823)

Edited by:

Didier Chaussende and Gabriel Ferro

Pages:

709-712

DOI:

10.4028/www.scientific.net/MSF.821-823.709

Citation:

G. Rescher et al., "Impact of Nitric Oxide Post Oxidation Anneal on the Bias Temperature Instability and the On-Resistance of 4H-SiC nMOSFETs", Materials Science Forum, Vols. 821-823, pp. 709-712, 2015

Online since:

June 2015

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$38.00

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