Impact of Nitric Oxide Post Oxidation Anneal on the Bias Temperature Instability and the On-Resistance of 4H-SiC nMOSFETs
We study the impact of different nitric oxide (NO) post oxidation annealing (POA) procedures on the on resistance Ron of n-channel MOSFETs and on the threshold voltage shift ∆Vth following positive bias temperature stress (PBTS). All samples were annealed in an NO containing atmosphere at various temperatures and times. A positive stress voltage of 30 V was chosen which corresponds to an electric field of about 4.3 MV/cm. The NO POA causes a decrease in overall ∆Vth for longer NO POA times and higher NO POA temperatures. As opposed to the change in ∆Vth, the device Ron increases with NO POA temperature and time.
Didier Chaussende and Gabriel Ferro
G. Rescher et al., "Impact of Nitric Oxide Post Oxidation Anneal on the Bias Temperature Instability and the On-Resistance of 4H-SiC nMOSFETs", Materials Science Forum, Vols. 821-823, pp. 709-712, 2015