Oxide Traps Probed by Transient Capacitance Measurements on Lateral SiO2/4H-SiC MOSFETs

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In this paper, near interface traps (NITs) in lateral 4H-SiC MOSFETs were investigated employing temperature dependent transient gate capacitance measurements (C-t). The C-t measurements as a function of temperature indicated that the effective NITs discharge time is temperature independent and electrons from NITs are emitted toward the semiconductor via-tunnelling and/or trap-to-trap tunnelling. The NITs discharge time was modelled taking into account also the interface state density in a distributed circuit and it allowed to locate traps within a distance of about 1.3nm from the SiO2/4H-SiC interface.

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Edited by:

Robert Stahlbush, Philip Neudeck, Anup Bhalla, Robert P. Devaty, Michael Dudley and Aivars Lelis

Pages:

285-288

Citation:

P. Fiorenza et al., "Oxide Traps Probed by Transient Capacitance Measurements on Lateral SiO2/4H-SiC MOSFETs", Materials Science Forum, Vol. 924, pp. 285-288, 2018

Online since:

June 2018

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