Characterization of pn-Diode Fabricated from Surface Damage-Free 4H-SiC Wafer Using Si-Vapor Etching Process

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We investigate electrical characteristics of the pn-diode fabricated using the epitaxial films on the surface damage-free 4H-SiC (0001) Si-face 4° off-cut wafers prepared by the completely thermal-chemical etching process; Si-vapor etching (Si-VE) technology. The forward and reverse current-voltage (I-V) characteristics of pn-diodes correlated to the epitaxial defects are discussed. The device at the defect-free area includes 11 % failed diodes on the chemo-mechanical polishing (CMP) wafer while 0 % on the Si-VE wafer. The latent scratches and mechanical damages, which increase the forward and reverse leakage current of the pn-diodes, are completely removed by the Si-VE. The Si-VE exposes the carbon inclusions in the wafer to form the small bump which ends up with the larger bump defect on the epitaxial surface. These bumps cause leak current of the forward characteristics while all of the reverse characteristics are normal. The epitaxial film on the Si-VE surface has less density of the basal plane dislocations (BPDs) than the conventional CMP. It is hard to recognize the safe device on the CMP wafer without additional reliability test. The Si-VE wafer shows the apparent breakdown voltage fail on every small-number diode including BPDs under the simple test. It is considered that the Si-VE is possible to reduce ambiguity of the device characteristics under the relationship with the defects in comparison with the CMP.

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Edited by:

Robert Stahlbush, Philip Neudeck, Anup Bhalla, Robert P. Devaty, Michael Dudley and Aivars Lelis

Pages:

349-352

Citation:

S. Torimi et al., "Characterization of pn-Diode Fabricated from Surface Damage-Free 4H-SiC Wafer Using Si-Vapor Etching Process", Materials Science Forum, Vol. 924, pp. 349-352, 2018

Online since:

June 2018

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$38.00

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DOI: https://doi.org/10.1016/b978-0-444-63303-3.00016-x

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