Temperature-Dependence Study of the Gate Current SiO2/4H-SiC MOS Capacitors
We present a temperature-dependence electrical characterization of the oxide/semiconductor interface in MOS capacitors with a SiO2 layer deposited on 4H-SiC using dichlorosilane and nitrogen-based vapor precursors. The post deposition annealing process in N2O allowed to achieve an interface state density Dit 9.0×1011cm-2eV-1 below the conduction band edge. At room temperature, an electron barrier height (conduction band offset) of 2.8 eV was measured using the standard Fowler-Nordheim tunneling model. The electron conduction through the SiO2 insulating layer was evaluated by studying the experimental temperature dependence of the gate current. In particular, the Fowler-Nordheim electron barrier height showed a negative temperature coefficient (dφB/dT = - 0.98 meV/°C), which is very close to the expected value for an ideal SiO2/4H-SiC system. This result, obtained for deposited SiO2 layers, is an improvement compared to the values of the temperature coefficient of the Fowler-Nordheim electron barrier height reported for thermally grown SiO2. In fact, the smaller dependence of φB on the temperature observed in this work represents a clear advantage of our deposited SiO2 for the operation of MOSFET devices at high temperatures.
Robert Stahlbush, Philip Neudeck, Anup Bhalla, Robert P. Devaty, Michael Dudley and Aivars Lelis
P. Fiorenza et al., "Temperature-Dependence Study of the Gate Current SiO2/4H-SiC MOS Capacitors", Materials Science Forum, Vol. 924, pp. 473-476, 2018