3300V SiC DMOSFETs Fabricated in High-Volume 150 mm CMOS Fab
We fabricated 3300V Silicon Carbide (SiC) DMOSFETs on 150mm substrates in a high volume automotive qualified Si CMOS foundry. In this paper we will show that JFET optimization can yield noticeable improvements in on-state performance without exceeding acceptable gate oxide electric fields. For the optimized design, breakdown voltages (BV) in excess of 3900V are observed along with a specific on resistance of 13.5mOhm-cm2 at room temperature and 30mOhm-cm2 at 150°C.
Robert Stahlbush, Philip Neudeck, Anup Bhalla, Robert P. Devaty, Michael Dudley and Aivars Lelis
B. Powell et al., "3300V SiC DMOSFETs Fabricated in High-Volume 150 mm CMOS Fab", Materials Science Forum, Vol. 924, pp. 731-734, 2018