SiC MOSFET Device Parameter Spread and Ruggedness of Parallel Multichip Structures

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This paper presents a preliminary study of the impact of device electro-thermal parameter spread and temperature variation on the robustness of SiC MOSFET parallel multi-chip power switch architectures. Reference is made to 1200 V – 80 mΩ rated commercial devices. Some major parameters are identified and selected, presenting experimental evidence of their impact during transient overload events. An advanced physics-based simulation model is then employed to extend the analysis to a more comprehensive set of parameters and operational conditions.

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Edited by:

Robert Stahlbush, Philip Neudeck, Anup Bhalla, Robert P. Devaty, Michael Dudley and Aivars Lelis

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811-817

Citation:

A. Castellazzi et al., "SiC MOSFET Device Parameter Spread and Ruggedness of Parallel Multichip Structures", Materials Science Forum, Vol. 924, pp. 811-817, 2018

Online since:

June 2018

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