Growth of 4H-SiC Epitaxial Layer through Optimization of Buffer Layer

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In this work the deposition of buffer layer has been studied in order to increase the quality of the epitaxial layer and improve the performance of device. The comparison between two different thicknesses of buffer layer reveals a decrease of crystallographic defects and an improvement of electrical parameters of MOSFET device as leakage current and breakdown voltage.

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Edited by:

Robert Stahlbush, Philip Neudeck, Anup Bhalla, Robert P. Devaty, Michael Dudley and Aivars Lelis

Pages:

84-87

Citation:

N. Piluso et al., "Growth of 4H-SiC Epitaxial Layer through Optimization of Buffer Layer", Materials Science Forum, Vol. 924, pp. 84-87, 2018

Online since:

June 2018

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