1300°C Annealing of 1×1020 Al+ Ion Implanted 3C-SiC

The results of the first experiments for achieving the thermal equilibrium during 1300 °C annealing of 1×1020 cm-3 ion implanted Al+ in 3C-SiC are shown. X-ray diffraction, through reciprocal space maps and 2Θ scans, characterizes the 3C-SiC lattice recovery. The achievement of a ohmic behavior of Ni/Al/Ti alloy indicates the onset of a measurable electrical activation of the Al implanted layer. The Al electrical activation is qualified through the implanted layer sheet resistance.


Introduction
The cubic polytype of SiC can be hetero-epitaxially grown on single crystal Si. The expected advantages are a relative low energy budget for the fabrication of an hetero-epitaxial 3C-SiC/Si wafer and a potential integration between SiC and Si based electronics. The Si melting temperature limits the maximum processing temperature of 3C-SiC/Si wafers to 1412°C. This is a serious issue for the electrical activation of the ion-implanted p-type Al dopant, for which annealing temperatures > 1600°C are required, in general. Nevertheless, when the Arrhenius plot of the electrical activation of 1×10 20 cm -3 implanted Al in 4H-SiC [1] is extrapolated towards low temperatures down to 1300°C, it can be seen that a p-type material resistivity of about 1.5 Ωcm can be achieved. Such a value is promising to obtain ohmic contacts [2] and thus to perform electrical characterizations. The difficulty is to preview the minimum annealing time to reach the thermal equilibrium of Al electrical activation when post implantation annealing temperature is as low as 1300°C. This study shows the results of the first experiment aiming to identify such annealing time.

Experiments and Methodology
A non-intentionally doped (NID) n-type 10 µm 3C-SiC layer has been hetero-epitaxially grown on a p-type <0001> Si wafer (B doped, 5 kΩ•cm). The 3C-SiC wafer face has been polished to reach a sub-nanometer root mean square (rms) surface roughness when measured by Atomic Force Microscopy (AFM). The polished 3C-SiC face has been Al + ion implanted at 500°C, using 22° twist and 8° tilt angles, and different ion doses and ion energies to obtain an almost flat Al depth profile of 1×10 20 cm -3 over about 200 nm next to the sample surface, as verified by Secondary Ion Mass Spectroscopy (results not here shown). After ion implantation, the wafer was diced in small pieces; each one protected by a carbon cap (C-cap) that was obtained by pyrolysis in forming gas of a spun resist film on the ion implanted face [3].
Post implantation annealing was performed in high purity Ar ambient, at atmospheric pressure, with the sample inside a radio frequency (RF) heated graphite crucible. Due to the limit imposed by the Si melting temperature and by the intrinsic temperature gradient of every RF heating system, the annealing temperature was 1300°C. Heating and cooling rates were linear 100°C/min and exponential with 60 s characteristic time, respectively. The applied annealing times were 88 h, 186 h, and 444 h.
The lattice structure of the polished as-grown, as-implanted, and post implantation 186 h annealed 3C-SiC specimens were characterized by X-ray diffraction (XRD) through the reciprocal space maps of the 3C-SiC(002) and 3C-SiC(113) peaks, and the 2θ scan of the 3C-SiC (002) peak.
Ni/Al/Ti/3C-SiC contacts, with circular geometry for the measurement of the specific contact resistance by the transmission line method (TLM-C devices), were deposited on the top of the Al implanted layers of the samples annealed for 88 h and 444 h. Details about contact fabrication are in [2]. For ohmic behavior of the current-voltage (I-V) curves of the TLM devices, the sheet resistance of the Al implanted layer can be calculated [4]. The onset of the metal contact ohmicity and the values of sheet resistance can be used for a qualitative estimation of the electrical activation of the ion implanted Al. For comparison, a 4H-SiC wafer was Al + ion implanted with the same schedule of the 3C-SiC/Si wafer, post implantation annealed at 1350°C for different times, and electrically characterized by using TLM-C devices.

Results and Discussion
Figs. 1(a-c) show selected results of the XRD reciprocal space maps measurements. Figs. 1(a) and 1(b) show the XRD reciprocal space maps of the 3C-SiC(002) peak of the as grown and polished 3C-SiC film and of the the same film after ion implantation, respectively. Fig. 1(c) shows the XRD reciprocal space map of the 3C-SiC (113) peak for the as-implanted specimen. Fig. 2 shows the comparison among the XRD 2θ scans of 3C-SiC (002) peak of the as-grown, as implanted, and 1300 °C/186 h post implantation annealed specimens. The analogous comparison for the 3C-SiC(113) peak shows a similar trend.
The comparison between the maps of as-grown and as-implanted samples, Fig. 1(a) and Figs. 1(b,c), respectively, show that after ion implantation the 3C-SiC lattice is still crystalline with an anisotropic deformation of the lattice structure. In particular, in the implanted layer, the 3C-SiC lattice parameter increases along the directions orthogonal to the planes (002) and (113). The former direction is orthogonal to the wafer plane; the latter is about 13° from the former. No variations along directions that are longitudinal to the wafer plane are present. The more intense elongation is along the (002) direction where the formation of a secondary diffraction peak appears in Fig. 1(b).  Fig. 1(a,b,c) Reciprocal space maps of (a,b) 3C-SiC(002) and (c) 3C-SiC(113) peaks of (a) the as-grown and polished sample, (b, c) the as-implanted sample.
The comparison between the XRD 2θ scans of the 3C-SiC (002) peak of the as grown and the as implanted samples, in Fig. 2, allow the quantification of a lattice increase of about 1% in the direction orthogonal to the wafer surface. The comparison of the 1300 °C/ 186 h sample spectrum with those of the as grown and as implanted specimens, shows that the original 3C-SiC lattice structure is almost restored after annealing. In fact, the secondary peak of the as implanted sample shifts to the main one and blows up as a bump next to it. The angular amplitude between this bump and the main peak is too large to be due to a lattice deformation because of the Al atoms in substitutional position [5]. Thus, the bump is due to unrecovered damage, or to the formation of a secondary damage, that makes slightly larger the lattice parameter in the reordered 3C-SiC.
The expansion of the 3C-SiC lattice in the as implanted layer is due to the presence of a non negligible amount of interstitial atoms that remains in the lattice after the hot ion implantation process. The anisotropy of the expansion, mostly in the direction orthogonal to the wafer surface, is attributed to the constrain action of the bulk 3C-SiC crystal on the ion implanted 3C-SiC thin crystalline layer. The presence of a less intense, but similar deformation, in the 186 h annealed specimen, shows that 1300 °C is a sufficient temperature to activate a recovery of the damaged 3C-SiC lattice, but the 186 h time is not enough long to complete it.
The TLM-C devices of the 88 h annealed sample are not ohmic, while those of the 444 h are ohmic. This shows that 88 h are not sufficient to obtain a measurable electrical activation of the ion implanted Al in 3C-SiC. Fig. 3 shows the sheet resistance data of the 3C-SiC sample after 1300 °C/444 h annealing, and of the 4H-SiC specimens after 1350 °C annealing for different times. For reference purpose, the expected values, based on the extrapolated Arrhenius plot for the 4H-SiC specimens [1], are also shown in Fig. 3. Moreover, Fig. 3 shows also the data of the 1500 °C 1×10 20 cm -3 Al implanted 4H-SiC specimens of ref. [1]. It is evident that while the 4H-SiC data have the previewed trend, the 3C-SiC datum is much lower than the hypothesized value. The 3C-SiC datum is even lower than the trend drawn by the 1500 °C data. The fact that all the samples have been annealed in the same furnace excludes errors due to the calibration of the furnace temperature.
Basing on the comparisons in Fig. 3 several hypotheses are possible. First, the 1300°C post implantation annealing is much more efficient in 3C-SiC than the 4H-SiC, for identical ion implantation process. Second, the estimated sheet resistance of the 444 h 3C-SiC sample appears lower than that of the implanted layer because of the formation of a parallel path of lower conductivity, which might be either at the   wafer surface or below the implanted layer in the bulk 3C-SiC [6]. Third, a deterioration of the 3C-SiC film during several hundred hours at 1300 °C might occur [7]. All these hypotheses are under testing. At the moment, Raman analyses (not shown here) show that there is no graphitization of the SiC surface between adjacent metal pads, which excludes a parallel conduction that may come from an undesired SiC surface graphitization during metal alloying at 1000°C in vacuum.

Conclusion
This study shows that the present knowledge about the thermodynamics of the electrical activation of ion implanted Al in 4H-SiC can be a guide for planning post implantation annealing experiments at a temperature as low as1300 °C.
The first results of experiments aiming at identifying the thermal equilibrium for the 1300 °C electrical activation of 1×10 20 cm -3 ion implanted Al + in 3C-SiC show no measurable electrical transport after 88 h annealing, very promising lattice recovery after 186 h annealing, and a sheet resistance after 444 h annealing that is much lower than the expected value. To understand these results other experiments are mandatory. Nevertheless, the positive news is that the electrical activation of ion implanted Al in SiC at 1300°C is measurable.