Ultra Clean Processing of Semiconductor Surfaces XIV

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Authors: Glenn W. Gale
Abstract: The semiconductor industry is undergoing a transition driven by end use markets. In recent years, mobile devices have been the leading generator of growth. Now the connection of various products and machines to the internet is generating new and extensive demands for memory (storage of the data), logic (intelligent processing of the data including machine learning), and sensing (e.g., image sensors generating visual data). Thus the versatile planar MOS transistor based semiconductor technology has diverged into various specialized and complex branches, with each technology type using unique approaches to address scaling challenges. These lead to specific requirements for semiconductor wafer surface preparation. This paper will review the high level industry trends and how they affect surface preparation specifically.
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Authors: Qi Ming Sun, Alexander Melnikov, Andreas Mandelis, Robert Pagliaro
Abstract: Surface electronic quality of wet-cleaned Si wafers was characterized quantitatively and all-optically via spatially-resolved surface recombination velocity (SRV) imaging using InGaAs-camera-based dynamic heterodyne lock-in carrierography. Six samples undergone four different hydrofluoric special-solution etching conditions were tested, their SRV distributions at different queue times after the hydrogen passivation processes were obtained, and a quantitative assessment of their surface electronic quality was made based on the evolution behavior of globally-integrated information from the SRV images. The data acquisition time for an SRV image with full camera pixel resolution was about 3 min. The methodology introduced here is promising for in-line nondestructive testing/evaluation and quality control at different fabrication/manufacturing stages in the electronic industry. Keywords: heterodyne lock-in carrierography, surface recombination velocity, quantitative imaging, HF etching, Si wafers
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Authors: Kota Sotoku, Masaki Inaba, Hiroaki Takahashi
Abstract: We investigated an alternative technology to conventional organic material removal that replaces sulfuric acid and hydrogen peroxide (SPM). We assumed that the removal model of organic material by ozone gas was absorption of oxygen radicals, generated by thermal decomposition of ozone, on a surface and subsequent reaction with organic materials. Then we characterized the correlation between removal rate and process parameter, and the validity of the model was verified. It also showed that this method is effective for high dose, ion-implanted photoresists.
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Authors: Fei Wang, Bubesh Jotheeswaran, John Tolle, Xing Lin, Pei Pei Gao, Alex Demos
Abstract: Advanced technology node demands new capabilities in pre-cleaning substrates of epitaxy films. In particular, cleaning carbon and native oxide on Si and SiGe surfaces are required. In this paper, we present an approach to cleaning both carbon and Si/SiGe native oxide using Previum chamber with two distinct chemistries. FTIR and SEM are used to characterize the conversion and sublimation steps of cleaning native oxide, and carbon film etch rate by hydrogen radicals is presented. The carbon cleaning and oxide cleaning capabilities are integrated in Previum chamber and significantly improved cleaning results are supported by SIMS.
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Authors: Rita Vos, Tim Steylaerts, Alexis Franquet, Alain Moussa, Tim Stakenborg, Karolien Jans
Abstract: The vapor-phase deposition of 11-azidoundecyltrimethoxysilanes at reduced pressure and elevated temperature allows the introduction of azido (N3) functionalized silicon wafer substrates. This process can be optimized by controlling the amount of surface adsorbed water and results in uniform and reproducible self-assembled monolayers (SAMs). The N3-SAM density as investigated via TOF-SIMS is comparable on thermal oxide and Si3N4 substrates. Furthermore, it is demonstrated that biomolecules can be successfully conjugated on both substrates using azide-alkyne ‘click’ reactions.
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Authors: Sang Woo Lim
Abstract: The integration of III-V and Ge materials on Si surface causes many issues with complexity such as lattice mismatch with silicon. In particular, the surface preparation and passivation of InGaAs is very challenging, because the formation of InGaAs/high-K interface is important, but not well understood. For the systematical study of InGaAs surface during wet processes, the effect of various wet etching processes on the surfaces of binary III-V compound semiconductors (GaAs, InAs, GaSb and InSb) was studied from the viewpoints of surface oxidation, material loss (dissolution), and passivation. Based on that, further effort to understand the surface reactions on ternary InGaAs compound semiconductor was made. In addition, process sequential effect on the InGaAs surface was investigated.
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Authors: Kenya Nishio, Suguru Saito, Yoshiya Hagimoto, Hayato Iwamoto
Abstract: In this work, we investigated interfacial properties of InP, which is a typical group III-V compound used for semiconductors, by using a chemical-treated metal oxide semiconductor (MOS) capacitor. The interfacial properties of InP is more affected by interface state density than the surface roughness and is greatly affected by In2O3 in particular. Additionally, we evaluated In2O3 growth during 24-hour rinsing and air exposure and found that In2O3 on an InP surface grows larger during rinsing than during air exposure. To reduce In2O3, the rinse needs to be optimized.
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Authors: Dennis H. van Dorp, Sophia Arnauts, Mikko Laitinen, Timo Sajavaara, Johan Meersschaut, Thierry Conard, Frank Holsteyns, John Kelly
Abstract: In this study of nanoscale etching for state-of-the-art device technology the importance of the nature of the surface oxide, is demonstrated for two III-V materials. Etching kinetics for GaAs and InP in acidic solutions of hydrogen peroxide are strikingly different. GaAs etches much faster, while the dependence of the etch rate on the H+ concentration differs markedly for the two semiconductors. Surface analysis techniques provided information on the surface composition after etching: strongly non-stoichiometric porous (hydr)oxides on GaAs and a thin stoichiometric oxide that forms a blocking layer on InP. Reaction schemes are provided that allow one to understand the results, in particular the important difference in etch rate and the contrasting role of chloride in the dissolution of the two semiconductors.
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Authors: Eunseok Oh, Sang Woo Lim
Abstract: Removal of highly ion-implanted photoresist on the trench-structured GaAs was conducted by mixtures of organic solvents with additives. The ion implanted KrF photoresist on trench-structured GaAs was completely removed at 30 °C when an additive was added to the DMSO+ acetonitrile (AcN) solution. In addition, the removal rate of the implanted photoresist could be increased in DMSO+AcN+additive solution. It was also observed that the DMSO+AcN+additive solution did not cause significant material loss on the GaAs surface during the photoresist removal process.
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