Papers by Author: Ayayi Claude Ahyi

Paper TitlePage

Authors: Yong Ju Zheng, Tamara Isaacs-Smith, Ayayi Claude Ahyi, S. Dhar
Abstract: In this work, we investigate the effect of borosilicate glass (BSG) as gate dielectric on dielectric/4H-SiC interface traps and channel mobility in 4H-SiC MOSFETs. The interface trap characterization by C−ψs analysis and I-V characterization show lower fast interface trap density (Dit) as well as significant improvement of channel field-effect mobility on devices with BSG than that on devices with standard NO anneal. In addition, the results indicate interface trap density decreases with increasing B concentration at the interface of BSG/4H-SiC, which in turn, results in higher channel mobility.
Authors: Ayayi Claude Ahyi, Aaron Modic, C. Jiao, Y. Zheng, Gang Liu, L.C. Feldman, Sarit Dhar
Abstract: Lateral MOSFET devices with a thin surface counter-doped layer using Sb and As with and without NO passivation have been fabricated and characterized. The results demonstrate that Sb and As counter-dope the interface without significant trap passivation while in combination with NO there is a superposition of both trap passivation and counter-doping related performance enhancement. In addition, by varying the counter doping level, a universal mobility characteristics of NO passivated devices has been identified.
Authors: A.V. Adedeji, Ayayi Claude Ahyi, John R. Williams, M.J. Bozack, S.E. Mohney, B. Liu, James D. Scofield
Abstract: Composite ohmic contacts designed for SiC devices operating in air at 350°C have been studied. Ohmic contacts to n- and p-4H-SiC were protected against inter-diffusion and oxidation by Ta-Si-N layers obtained by sputter deposition from a TaSi2 target in a mixture of Ar and N2. Platinum was sputter-deposited at 250°C to promote adhesion between the Ta-Si- N barrier layer and a thick Au cap layer. Platinum also acts as a barrier to the diffusion of Au. The electrical and mechanical characteristics of the composite contacts were stable after hundreds of hours of annealing in air at 350°C. We report the effects of thermal aging on the specific contact resistance and the semiconductor sheet resistance, and the results of wire bond pull and shear tests following aging for Ta-Si-N / Pt / Au stacks deposited on both SiO2 dielectric layers and the ohmic contact layers.
Authors: Ayayi Claude Ahyi, S.R. Wang, John R. Williams
Abstract: The effects of gamma radiation on field effect mobility and threshold voltage have been studied for lateral n-channel 4H-SiC MOSFETs passivated with nitric oxide. MOS capacitors (n and p) and n-channel lateral MOSFETs were irradiated unbiased (floating contacts) for a total gamma dose of 6.8Mrad (Si). The MOS capacitors were used to study the radiation-induced interface traps and fixed oxide charge that affect the performance of the MOSFETs. Radiationinduced interface traps were observed near the SiC valence band edge and just above mid-gap, and field effect channel mobility was reduced by 18-20% following irradiation. Even so, 4HMOSFETs appear to be more radiation tolerant than Si devices.
Authors: Asanka Jayawardena, Ayayi Claude Ahyi, Gang Liu, Rob G. Shaw, S. Dhar
Abstract: In this work, we examined the oxidation growth rates of the (0001) Si-face and (11−20) a-faces of 4H-SiC by carrying out oxidation in the 850°C-950 °C temperature range in a plasma afterglow furnace for application to trench MOSFETs. At 900 °C, this method results in almost equal oxide thickness on the Si-face and a-face which would nominally correspond to trench bottom and sidewalls in trench devices. Our results indicate that after NO annealing, the electronic properties of the plasma oxidized SiO2/SiC interface is comparable to control samples with gate oxides formed by dry oxidation at 1150 °C followed by NO annealing. Next, the effect of reactive ion etching (RIE) of 4H-SiC surfaces prior to gate oxidation was investigated using planar 4H-SiC MOS capacitors. Our experiments show that oxidation followed by NO annealing of surfaces with smooth morphology following the RIE step, results in similar interface charge and trap densities as MOS capacitors which did not undergo the RIE etching.
Authors: S. Dhar, S.R. Wang, Ayayi Claude Ahyi, Tamara Isaacs-Smith, Sokrates T. Pantelides, John R. Williams, Leonard C. Feldman
Abstract: Post-oxidation anneals that introduce nitrogen at the SiO2/4H-SiC interface have been most effective in reducing the large interface trap density near the 4H-SiC conduction band-edge for (0001) Si face 4H-SiC. Herein, we report the effect of nitridation on interfaces created on the (11 20) a-face and the (0001) C-face of 4H-SiC. Significant reductions in trap density (from >1013 cm-2 eV-1 to ~ 1012 cm-2 eV-1 at EC-E ~0.1 eV) were observed for these different interfaces, indicating the presence of substantial nitrogen susceptible defects for all crystal faces. Annealing nitridated interfaces in hydrogen results in a further reduction of trap density (from ~1012 cm-2 eV-1 to ~5 x 1011 cm-2 eV-1 at EC-E ~0.1 eV). Using sequential anneals in NO and H2, maximum field effect mobilities of ~55 cm-2 V-1s-1 and ~100 cm-2 V-1s-1 have been obtained for lateral MOSFETs fabricated on the (0001) and (11 20) faces, respectively. These electronic measurements have been correlated to the interface chemical composition.
Authors: Sarit Dhar, Ayayi Claude Ahyi, John R. Williams, Sei Hyung Ryu, Anant K. Agarwal
Abstract: Hall measurements on NO annealed 4H-SiC MOS gated Hall bars are reported in the temperature range 77 K- 423 K. The results indicate higher carrier concentration and lower trapping at increased temperatures, with a clear strong inversion regime at all temperatures. In stark contrast to Si, the Hall mobility increases with temperature for 77 K-373K, above which the mobility decreases slightly. The maximum experimental mobility was found to be ~50 cm2 V-1 s-1 which is only about 10% of the 4H-SiC bulk mobility indicating that while NO annealing drastically improves trapping, it does not improve the mobility significantly. Supporting modeling results strongly suggest the presence of a disordered SiC channel region.
Authors: Yogesh K. Sharma, Ayayi Claude Ahyi, Tamara Issacs-Smith, Xiao Shen, Sokrates T. Pantelides, Xing Guang Zhu, John Rozen, Leonard C. Feldman, John R. Williams, Yi Xu, Eric Garfunkel
Abstract: Phosphorous passivation of the SiO2/4H-SiC interface lowers the interface trap density and increases the field effect mobility for n-channel MOSFETs to twice the value of 30-40cm2/V-s obtained using standard NO nitridation. Passivation using P2O5 introduced with an SiP2O7 planar diffusion source (PDS) converts the oxide layer to phosphosilicate glass (PSG) which is a polar material. BTS (bias‐temperature‐stress) measurements with MOS capacitors and FETs show that the benefits of reduced interface trap density and increased mobility are offset by unstable flat band and threshold voltages. This instability can be removed by etching away the PSG oxide and depositing a replacement SiO2 layer. However, trap densities for etched MOS capacitors are "NO-like" (i.e., higher), which would lead one to expect a lower mobility if MOSFETs are fabricated with the PSG / etch / deposited oxide process.
Authors: John Rozen, Xing Guang Zhu, Ayayi Claude Ahyi, John R. Williams, Leonard C. Feldman
Abstract: We report on the benefits and the shortcomings of the NO annealing process following observations made on capacitors and transistors with various nitrogen densities at the SiO2/SiC interface. While NO annealing leads to a progressively lower interface state density and higher inversion mobility, consistent with Coulomb-limited transport, MOSFET properties are still limited by the relatively poor interface quality. Moreover, NO induces a large amount of hole traps in the oxide. We establish that these properties are not related to the oxidation rate and we discuss them in terms of the nitrogen content.
Showing 1 to 9 of 9 Paper Titles