Papers by Author: C. Mark Johnson

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Authors: Konstantin Vassilevski, Irina P. Nikitina, Alton B. Horsfall, Nicolas G. Wright, C. Mark Johnson
Abstract: 3.3 kV rated 4H-SiC diodes with nickel monosilicide Schottky contacts and 2-zone JTE regions were fabricated on commercial epitaxial wafers having a 34 m thick blocking layer with donor concentration of 2.2×1015 cm-3. The diodes were fabricated with and without additional field stop rings to investigate the impact of practically realizable stopper rings on the diode blocking characteristics. The field stop ring was formed by reactive ion etching of heavily doped epitaxial capping layer. The diodes with field stop rings demonstrated significantly higher yield and reduction of reverse leakage current. The diodes demonstrated blocking voltages in excess of 4.0 kV and very low change of leakage current at ambient temperatures up to 200 °C.
Authors: Konstantin Vassilevski, Irina P. Nikitina, Alton B. Horsfall, Nicolas G. Wright, C. Mark Johnson
Abstract: 4H-SiC diodes with 0.60 mm2 nickel silicide Schottky contacts were fabricated on commercial epitaxial layers. At room temperature, the diodes have specific on-resistances (RON-SP) down to 10.5 mΩcm2 and blocking voltages (VBL) up to 4.6 kV, which is equal to 93 % of the calculated parallel plane breakdown voltage for used epitaxial structure. The corresponding figure-of-merit, defined as (VBL)2/RON-SP, is equal to 2015 MW/cm2 and is among the highest FOM values reported to date. The diodes demonstrated stable operation at forward current of 1 A and VBL value in excess of 3.3 kV at ambient temperatures up to 200 °C.
Authors: Konstantin Vassilevski, Alton B. Horsfall, C. Mark Johnson, Nicolas G. Wright, Anthony G. O'Neill
Authors: D.J. Morrison, A. Keir, I.H. Preston, Keith P. Hilton, Michael J. Uren, C. Mark Johnson
Authors: Nicolas G. Wright, Konstantin Vassilevski, Irina P. Nikitina, Alton B. Horsfall, C. Mark Johnson, Praneet Bhatnagar, Peter Tappin
Abstract: New results are presented of a surface trench defect observed during anneal of room temperature Al implants. The size of the surface defect is proportional to anneal temperature and occurs predominantly in the implanted zone. Signs of lattice strain are observed outside the implanted zone as well.
Authors: S.J. Rashid, C. Mark Johnson, F. Udrea, Andrej Mihaila, G. Amaratunga, Rajesh Kumar Malhan
Abstract: A novel high temperature wire bondless packaging technique is numerically investigated in this paper. Extraction of device effective resistivity with temperature from numerical characteristics of 1.2kV 4H-SiC MOSFETs at a current density of 400A/cm2 have demonstrated a T−2 temperature dependence. Electro-thermal finite element analysis (FEA) of 1.2kV 4H-SiC MOSFETs sandwiched between two etched direct-bonded-copper substrate tiles has been performed. The thermal resistance of the ceramic sandwich package shows a 75% reduction in thermal resistance compared to conventional wire bonded assemblies. Mechanical analysis of the assembly has been used to investigate the residual stresses in the SiC dies at room temperature, which are then alleviated at higher temperatures during device operation. Mismatch of the expansion coefficients of the auxiliary materials in the assembly result in elevated stresses at full load operation, however these are well below the tensile strength of the respective materials and hence do not compromise the mechanical integrity of the package.
Authors: Praneet Bhatnagar, Alton B. Horsfall, Nicolas G. Wright, C. Mark Johnson, Konstantin Vassilevski, Anthony G. O'Neill
Abstract: Physics-based analytical models are seen as an efficient way of predicting the characteristics of power devices since they can achieve high computational efficiency and may be easily calibrated using parameters obtained from experimental data. This paper presents an analytical model for a 4H-SiC Enhancement Mode Vertical JFET (VJFET), based on the physics of this device. The on-state and blocking behaviour of VJFETs with finger widths ranging from 1.6+m to 2.2+m are studied and compared with the results of finite element simulations. It is shown that the analytical model is capable of accurately predicting both the on-state and blocking characteristics from a single set of parameters, underlining its utility as a device design and circuit analysis tool.
Authors: Nicolas G. Wright, C. Mark Johnson, Alton B. Horsfall, Cyril Buttay, Konstantin Vassilevski, W.S. Loh, R. Skuriat, P. Agyakwa
Abstract: The adoption of SiC devices as a viable technology depends crucially on maximising the potential advantages of the material. This is best achieved by the adoption of co-design techniques in which the optimisation of the SiC device is performed in parallel to that of the package and the overall application. This paper considers suitable techniques for this co-design and describes new approaches to the development of SiC technology for practical applications.
Authors: W.S. Loh, J.P.R. David, Stanislav I. Soloviev, H.Y. Cha, Peter M. Sandvik, J.S. Ng, C. Mark Johnson
Abstract: The hole dominated avalanche multiplication characteristics of 4H-SiC Separate Absorption and Multiplication avalanche photodiodes (SAM-APDs) were determined experimentally and modeled using a local multiplication model. The 0.5x 0.5mm2 diodes had very low dark current and exhibited sharp, uniform breakdown at about 580V. The data agree with modeling result using extrapolated impact ionization coefficients reported by Ng et al. and is probably valid for electric fields as low as ~0.9MV/cm at room temperature provided that both the C-V measurements and electric field determination in this work are correct. The packaged devices demonstrate a positive temperature coefficient of breakdown voltage for temperatures ranging from 100K to 300K which is a desired feature for extreme environment applications.
Authors: Nicolas G. Wright, N. Poolamai, Konstantin Vassilevski, Alton B. Horsfall, C. Mark Johnson
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