Papers by Author: Hui Yong Hu

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Authors: Shan Shan Qin, He Ming Zhang, Hui Yong Hu, Xiao Bo Xu, Xiao Yan Wang
Abstract: A subthreshold current model for fully depleted strained Si on insulator (FD SSOI) MOSFET is developed by solving the two-dimensional (2D) Poisson equation and the conventional drift-diffusion theory. Model verification is carried out using device simulator ISE. Good agreement is obtained between the model’s calculations and the simulated results. This subthreshold current model provides valuable reference to the FD-SSOI MOSFET design.
Authors: Shan Shan Qin, He Ming Zhang, Hui Yong Hu, Xiao Yan Wang, Guan Yu Wang
Abstract: Threshold voltage models for both buried channel and surface channel for the dual-channel strained Si/strained Si1-xGex/relaxd Si1-yGey(s-Si/s-SiGe/Si1-yGey) p-type metal-oxide-semiconductor field-effect transistor (PMOSFET) are presented in this paper. And the maximum allowed thickness of s-Si is given, which can ensure that the strong inversion appears earlier in the buried channel (compressive strained SiGe) than in the surface channel, because the hole mobility in the buried channel is higher than that the surface channel. They offer a good accuracy as compared with the results of device simulator ISE.
Authors: Xiao Bo Xu, He Ming Zhang, Hui Yong Hu, Shan Shan Qin, Jiang Tao Qu
Abstract: An analytical expression for collector resistance of a novel vertical SiGe partially-depleted accumulation-subcollector HBT on thin SOI is obtained. Supported by simulation result, the resistance decreases quickly with the increase of substrate-collector bias and improves the transit frequency dramatically. The model is found to be significant in the design and simulation of 0.13 μm millimeter wave SiGe SOI BiCMOS technology.
Authors: Yu Chen Li, He Ming Zhang, Hui Yong Hu, Yu Ming Zhang, Bin Wang, Chun Yu Zhou, Yong Le Lou
Abstract: The effect of high-k material on gate threshold voltage for double gate tunnel field-effect transistor (DG-TFET) is studied in this paper. By physically derived the model of threshold voltage for DG-TFET, the quantitative relationship between threshold voltage and gate length is also discussed. It is shown that the proposed model is consistent with the simulation results, and can also easily predict the improved performance on the gate threshold voltage when using high-κ dielectrics and the limited effect on gate threshold voltage when changing the gate length.
Authors: Xiao Bo Xu, He Ming Zhang, Hui Yong Hu, Jian Li Ma, Li Jun Xu
Abstract: The standard Early voltage of the SPICE Gummel-Poon model (SGP) is generalized for SiGe npn heterojunction bipolar transistors (HBTs). An accurate model for Early effects compatible with the SGP model is obtained considering graded germanium induced bandgap narrowing effect in the base in modern SiGe HBTs and simplified to a compact model which is consistent with ISE TCAD simulation results. The presentation of the Early effect model is significant for the design and simulation of the high performance SiGe BiCMOS technology.
Authors: Jian Jun Song, He Ming Zhang, Hui Yong Hu, Xian Ying Dai, Rong Xi Xuan
Abstract: The intrinsic carrier concentration is the important parameter for researching strained Si1-xGex materials properties and evaluating Si-based strained devices parameters. In this paper, at the beginning of analyzing the band structure of strained Si1-xGex/(101)Si, the dependence of its effective densities of states for the conduction and valence bands (Nc, Nv) and its intrinsic carrier concentration (ni) on Ge fraction (x) and temperature were obtained. The results show that ni increases significantly due to the effect of strain in strained Si1-xGex/(101)Si. Furthermore, Nc and Nv decrease with increasing Ge fraction (x). In addition, it is also found that as the temperature becomes higher, the increase in Nc and Nv occurs. The results can provide valuable references to the understanding on the Si-based strained device physics and its design.
Authors: Jian Jun Song, Heng Sheng Shan, He Ming Zhang, Hui Yong Hu, Guan Yu Wang, Jian Li Ma, Xiao Bo Xu
Abstract: Strained Si1-xGex technology has been widely adopted to enhance hole mobility. One of the most important physical parameters is density of state near the top of valence band in strained Si1-xGex materials. In this paper, we first obtained the hole effective mass along arbitrarily k wavevector directions, the hole isotropic effective masses and density of state effective mass of hole in strained Si1-xGex/(001)Si with the framework of K.P theory. And then, model of density of state near the top of valence band in strained Si1-xGex/(001)Si materials was established, which can provide valuable references to the understanding on its material physics and theoretical basis on the other important physical parameters.
Authors: Jian Jun Song, Hua Ying Wu, He Ming Zhang, Hui Yong Hu, Heng Sheng Shan
Abstract: Based on Fermi's golden rule and the theory of Boltzmann collision term approximation, taking into account all the scattering mechanisms contributed by ionized impurity, acoustic phonon and intervalley phonon, the model of total scattering rate of strained Si/(100) Si1-xGex is established. Simulating of the scattering models with Matlab software, it was found that the total scattering rate of electron in strained Si/(100) Si1-xGex decreases obviously with the increasing stress when Ge fraction x is less than 0.2 and the values continue to show a constant tendency, and that the total electron scattering rate of strained Si/(100) Si1-xGex decreases about 57% at most comparison with one of unstrained Si. The result can provide valuable references to the research of electron mobility of strained Si materials and the design of NMOS devices.
Authors: Bin Wang, He Ming Zhang, Hui Yong Hu, Yu Ming Zhang, Bin Shu, Chun Yu Zhou, Yu Chen Li
Abstract: This paper presents a physical-based model for accumulation PMOS capacitor based on strained-Si/SiGe material. With this model, the physical mechanism of the “plateau”, observed in accumulation region of the C-V characteristics of the strained-Si(SSi)/SiGe PMOS capacitor, is studied. The results from the model show excellent agreement with the experimental data. The proposed model can provide valuable reference to the strained-Si device design and has been implemented in the software for extracting the parameter of strained-Si MOSFET.
Authors: Jiang Tao Qu, He Ming Zhang, Hui Yong Hu, Xiao Bo Xu, Guan Yu Wang, Xiao Yan Wang
Abstract: The impact of Drain-Induced Barrier Lowering effect (DIBL) on the shift of threshold voltage is prominent as the feature size of MOS device continue reducing. In this paper, a threshold voltage model for small-scaled strained Si nMOSFET is proposed to illustrate the impact of DIBL effect on the threshold voltage, which is based on the distribution of the charge in depletion layer when strong inversion occurred. By simulation, the influence of DIBL to variation threshold voltage with its design physical and geometric parameters can be predicted, such as gate length, drain bias, Ge content, oxide thickness, source/drain junction depth, and doping concentration. This model is significant for the design of high performance strained Si nMOSFET to restrain the DIBL effect.
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