Papers by Author: Jochen Friedrich

Paper TitlePage

Authors: Birgit Kallinger, Bernd Thomas, Jochen Friedrich
Abstract: Basal Plane Dislocations (BPD) in SiC are thought to cause degradation of bipolar devices as they can trigger the formation and expansion of stacking faults during device operation. Therefore, epilayers without any BPD are strongly recommended for the achievement of long-term reliable bipolar devices. Such epilayers can be achieved by supporting the conversion of BPD into Threading Dislocations (TD), which depends on the epitaxial growth mode (as described in literature). In this work, the influence of several pre-treatments of the SiC substrate prior to epitaxial growth and different epitaxial growth parameters on the reduction of the BPDs in the SiC epilayers was investigated on 4° off-axis substrates. The dislocation content in substrates and epilayers was determined by Defect Selective Etching (DSE) in molten KOH. The averaged BPD density in epitaxial layers can be reduced to < 100 cm-2 for substrate preparation techniques and to < 30 cm-2 for well-suited epitaxial growth parameters. A certain combination of epitaxial growth parameters leads to < 3 BPD/cm2 in the epitaxial layer.
Authors: Michael Knetzger, Elke Meissner, Joff Derluyn, Marianne Germain, Jochen Friedrich
Abstract: The influence of structural defects in the active layer of GaN-on-Si substrates on the vertical leakage current was studied. The structural defects were analyzed by analytical scanning electron microscopy by means of cathodoluminescence (CL). The leakage current was determined by vertical I-V measurements.Two possibilities were found, which give potential explanations for the variations of the vertical leakage current: i) Threading dislocations, which may partially form leakage paths, were detected by CL imaging. ii) Variations of the carbon doping, which is used to tune GaN to a semi insulating material were revealed by CL spectroscopy.
Authors: Daniel Kaminzky, Birgit Kallinger, Patrick Berwian, Mathias Rommel, Jochen Friedrich
Abstract: We present an extended model for the simulation of the effective minority carrier lifetime in 4H-SiC epiwafers after optical excitation. This multilayer model uses measured values (such as doping profile, point defect concentration and capture cross sections, epilayer thickness) as input parameters. The bulk lifetime and the diffusion constant are calculated from the actual time dependent excess carrier profiles, resulting in more realistic transients having different decay regimes than in other models. This enables a better understanding of optical lifetime measurements.
Authors: Birgit Kallinger, Daniel Kaminzky, Patrick Berwian, Jochen Friedrich, Steffen Oppel
Abstract: Electrical testing with regard to bipolar degradation of high voltage SiC devices cannot be done on wafer level, but only expensively after module assembly. We show that 4H-SiC material can be optically stressed by applying high UV laser intensities, i.e. bipolar degradation as in electrical stress tests can be provoked on wafer level. Therefore, optical stressing can be used for control measurements and reliability testing. Different injection (=stress) levels have been used similar to the typical doping level of the base material and similar to the established electrical stress test. The analysis of degradation is done by photoluminescence imaging which is a well-established technique for revealing structural defects such as Basal Plane Dislocations (BPDs) and stacking faults (SFs) in 4H-SiC epiwafers and partially processed devices.
Authors: Marc Hainke, Johannes Dagner, Jochen Friedrich, Georg Müller
Abstract: has commissioned the Crystal Growth Laboratory in the framework of the Materials Science Laboratory (MSL) User Support Program to develop the MSL furnace inserts and samplecartridge assemblies Thermal Modeling Tool (TMT). The TMT assists the definition, preparation and analysis of the experiments onboard the International Space Station (ISS). The tool is based on the CrysVUn software, which was especially designed for global simulation of heat and mass transport processes during crystal growth and alloy solidification in high tem perature furnaces with complex (axi-symmetric) geometries. The main features of CrysVUn are briefly presented in this paper. The preliminary thermal model of the Low Gradient Furnace is illustrated and the model optimization strategy using genetic algorithms is briefly explained. Initial correlation results show that good agreement between simulated and measured axial temperature distributions is obtained. Direct modeling of the radiative heat transfer through the heater Multi-Layer Insulation (MLI) using view factors appears to be necessary for an accurate predict on of the resulting heater power. An example for the application of the TMT is presented.
Authors: Birgit Kallinger, Patrick Berwian, Jochen Friedrich, Christian Hecht, Dethard Peters, Peter Friedrichs, Bernd Thomas
Abstract: 4H-SiC PiN diodes for 6.5 kV were manufactured on both 4° and 8° off-cut substrates and subjected to an electrical stress test on wafer level and subsequent analysis of structural defects present in the active area of the diodes. For 8° off-cut diodes, the electrical characteristics with respect to leakage current and forward voltage drift are worse than the electrical characteristics of 4° off-cut diodes. Furthermore, a large number of stacking faults was found in 8° off-cut diodes, but little evidence for bipolar degradation was found in 4° off-cut diodes. Therefore, bipolar degradation was significantly reduced by avoiding BPDs in the active area of PiN diodes, i.e. by the use of 4° off-cut substrates. Furthermore, a strong correlation was found between the electrical screening test on wafer level and critical defects.
Showing 11 to 16 of 16 Paper Titles