Papers by Author: Ling Wang

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Authors: Ling Wang, Bo Mo, Ke Gao
Abstract: The existing problem of current laser pulse receiving system is that the laser pulses width is too narrow to be directly collected. And the consistency of the four signals acquisition is very strict. To deal with these problems, a new design of laser pulse receiver will be introduced in this article. This laser pulse receiving system includes the following structures: new high-speed laser pulse receiving hardware based on CPLD and Four-Quadrant Detectors, new peak-hold circuit of laser pulse, high-speed parallel ADC system, and processing data with fast interpolation algorithm in a Floating-Point DSP. Through the new design of high-speed parallel ADC system, the receiving system is able to simultaneously complete the timing of four high-speed laser pulse signals acquisition and the storing of data. The new construction of high-speed parallel acquisition is a core module in this design. And a new flow how to the DSP handle the data with fast interpolation algorithm will also be introduced in this article.
Authors: Ling Wang, Bo Mo, Ke Gao, Jin Lin
Abstract: A simulation system on information flow is designed to emulate the data communication on the RS-485 bus, the 1553B bus and the Ethernet bus. This simulation system has a high requirement for the extendibility, and it must have an ability to regulate and reconfigure the information flow on the three buses. To deal with the above problems, the simulation system has to be designed as a reconfigurable extendible real-time multi-bus simulation system. In order to meet the real-time requirements for the simulation of the information flow and the universal property for the most systems, this simulation system must be carried out based on a real-time operating systems (VxWorks) and a common hardware platforms. Firstly, this simulation system will have a total emulation and a whole simulation for the information flow, the communication status, the monitor nodes and the control nodes on each of the three buses. Secondly, this simulation system defines an extendible protocol between the simulation sever and the simulation terminals, and strictly plan the information flow among the simulation terminals to achieve the design requirements of the actual system. And then the simulation system has to own a reconfigure software components and a complete database functions of recording and stacking the data.
Authors: Ling Wang, Bo Mo, Qin Hua Li, Hong Mei
Abstract: In the distributed control system, to make sure the running of the system bus is long-term, stable and reliable, we design a new intelligent redundant serial bus as the system bus, and it will be introduced in this article. The new intelligent redundant serial bus (IRSBUS) is able to be configured into a dual redundant synchronous bus or a quadruple redundant asynchronous bus, and its redundancy is hot redundant that means two groups of the four signals are working together. We mainly design a redundant IP core, a redundant protocol and the byte format. The IP core of IRSBUS consists of the following major modules: Intelligent Signal Router, Signal Transceiver, Lines-connecting Status Detector, Synchronous Controller (Master), Synchronous Transponder (Slave), Redundant Results Decider, Interrupt Generator, Dual-port RAMs, Control and Status Registers, Master / Slave Redundant Logical Controller. The redundant protocol and byte format provide an extremely strict timing to synchronize the master-slaves and transmit the information. We show that our design allow to compare the redundant data to arrive at the correct results. It also provides a way to regroup the remaining signal lines into a system bus when one or two of the four signal lines are broken. And then it detects the lines-connection status every 100 milliseconds.
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