Papers by Author: Peter J. Wellmann

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Authors: Peter J. Wellmann, Katja Konias, Philip Hens, Rainer Hock, Andreas Magerl
Abstract: This work reports on the in-situ observation of a polytype switch during physical vapor transport (PVT) growth of bulk SiC crystals by x-ray diffraction. A standard PVT reactor for 2” and 3” bulk growth was set up in a high-energy x-ray diffraction lab. Due to the high penetration depth of the high-energy x-ray beam no modification of the PVT reactor was necessary in order to measure Laue diffraction patterns of the growing crystal with good signal to noise ratio. We report for the first time upon the in-situ observation of polytype switching during SiC bulk PVT growth.
Authors: Roland Weingärtner, Matthias Bickermann, Dieter Hofmann, Michael Rasp, Thomas L. Straubinger, Peter J. Wellmann, Albrecht Winnacker
Authors: A. Burchard, Manfred Deicher, Doris Forkel-Wirth, J. Freidinger, T. Kerle, R. Magerle, Wulf Pfeiffer, W. Prost, Peter J. Wellmann, Albrecht Winnacker
Authors: Thomas L. Straubinger, Matthias Bickermann, Michael Rasp, Roland Weingärtner, Peter J. Wellmann, Albrecht Winnacker
Authors: Philip Hens, Ulrike Künecke, Peter J. Wellmann
Abstract: We present p-type doping of bulk SiC crystals by the modified physical vapor transport (M-PVT) technique using TMA (Tri-Methyl-Aluminum). Using TMA as a dopant precursor allows a quite well defined crystal growth process control. The issue of improvement of conductivity (reduction of substrate resistivity) by reduction of unintentional acceptor compensation by nitrogen is addressed. It is shown that a decrease of compensation from approx. 3%...10% to approx. 0.5%...2.5% leads to a charge carrier mobility and, hence, conductivity increase of about factor two.
Authors: Peter J. Wellmann, Z.G. Herro, Sakwe Aloysius Sakwe, Pierre M. Masri, M.V. Bogdanov, S.Yu. Karpov, A.V. Kulik, M.S. Ramm, Yuri N. Makarov
Authors: Peter J. Wellmann, Desirée Queren, Ralf Müller, Sakwe Aloysius Sakwe, Ulrike Künecke
Abstract: The long term performance of today’s SiC based bipolar power devices suffer strongly from stacking fault formation caused by slip of basal plane dislocations, the latter often originating from the n-type doped SiC substrate wafer. In this paper, using sequentially p-type / n-type / p-type doped SiC crystals, we address the question, whether basal plane dislocation generation and annihilation behaves differently in n-type and p-type SiC. We have found that basal plane dislocations are absent or at least appear significantly less pronounced in p-type doped SiC, which may become of great importance for the stacking fault problem in SiC.
Authors: Matthias Wagner, E. Mustafa, S. Hahn, Mikael Syväjärvi, Rositza Yakimova, S. Jang, Sakwe Aloysius Sakwe, Peter J. Wellmann
Authors: Sakwe Aloysius Sakwe, Yeon Suk Jang, Peter J. Wellmann
Abstract: Wet chemical etching using molten KOH is the most frequently applied method to reveal structural defects in SiC. Until now etching kinetics of SiC in planes different from the polar cplane has not been reported. In this paper we report on defect etching of SiC in non-polar faces. Using a calibrated KOH defect-etching furnace with possibilities to set accurate etching temperatures we have etched SiC samples of various orientations to (i) study defect occurrence and their morphologies (ii) set KOH defect etching parameters for SiC for these orientations and (iii) investigate etching kinetics in relation to anisotropy/surface polarity. For non-polar planes of the same orientations a comparison in etching kinetics and defect morphologies in crystals grown in different directions is presented.
Authors: Philip Hens, Julian Müller, Erdmann Spiecker, Peter J. Wellmann
Abstract: In all heteroepitaxial systems the interface between substrate and layer is a crucial point. In this work SEM and TEM studies on the interface between silicon substrate and cubic silicon carbide (3C-SiC) layers obtained by chemical vapor deposition (CVD) are presented. A clear connection between process parameters, like the design of substrate cleaning, and the heating ramp, and resulting defect structures at the substrate-layer interface could be found. Whereas the process step of etching in hot hydrogen for oxide removal is crucial for avoiding the generation of closed voids of type 2, the design of the temperature ramp up to growth temperature during carbonization influences the interface roughness. Here a fast ramp helps to obtain a flat interface.
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