Papers by Author: Praneet Bhatnagar

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Authors: Nicolas G. Wright, Konstantin Vassilevski, Irina P. Nikitina, Alton B. Horsfall, C. Mark Johnson, Praneet Bhatnagar, Peter Tappin
Abstract: New results are presented of a surface trench defect observed during anneal of room temperature Al implants. The size of the surface defect is proportional to anneal temperature and occurs predominantly in the implanted zone. Signs of lattice strain are observed outside the implanted zone as well.
Authors: Praneet Bhatnagar, Alton B. Horsfall, Nicolas G. Wright, C. Mark Johnson, Konstantin Vassilevski, Anthony G. O'Neill
Abstract: Physics-based analytical models are seen as an efficient way of predicting the characteristics of power devices since they can achieve high computational efficiency and may be easily calibrated using parameters obtained from experimental data. This paper presents an analytical model for a 4H-SiC Enhancement Mode Vertical JFET (VJFET), based on the physics of this device. The on-state and blocking behaviour of VJFETs with finger widths ranging from 1.6+m to 2.2+m are studied and compared with the results of finite element simulations. It is shown that the analytical model is capable of accurately predicting both the on-state and blocking characteristics from a single set of parameters, underlining its utility as a device design and circuit analysis tool.
Authors: Praneet Bhatnagar, Alton B. Horsfall, Nicolas G. Wright, Anthony G. O'Neill, Konstantin Vassilevski, C. Mark Johnson
Authors: Praneet Bhatnagar, Nicolas G. Wright, Alton B. Horsfall, C. Mark Johnson, Michael J. Uren, Keith P. Hilton, A.G. Munday, A.J. Hydes
Abstract: Silicon Carbide (SiC) power devices are increasingly in demand for operations which require ambient temperature over 300°C. This paper presents circuit applications of normally-on SiC VFETs at temperatures exceeding 300°C. A DC-DC boost converter using a 4H-SiC VJFET and a SiC Schottky Diode was fabricated and operated up to 327°C. A power amplifier achieved a voltage gain of 3.88 at 27°C dropping to 3.16 at 327°C. This 20 % reduction is consistent with the fall in transconductance of the device.
Authors: Praneet Bhatnagar, Nicolas G. Wright, Alton B. Horsfall, Konstantin Vassilevski, C. Mark Johnson, Michael J. Uren, Keith P. Hilton, A.G. Munday, A.J. Hydes
Abstract: 4H-SiC depletion mode (normally-on) VJFETs were fabricated and characterised at temperatures up to 377 °C. The device current density at drain voltage of 50 V drops down from 54 A/cm2 at room temperature to around 42 A/cm2 at 377 °C which is a 20 % reduction in drain current density. This drop in drain currents is much lower than previously reported values of a 30 % drop in JFETs at high temperatures. The average temperature coefficient of the threshold voltage was found to be -1.36 mV/°C which is smaller than for most Si FETs. We have found that these devices have shown good I-V characteristics upto 377 °C along with being able to retain its characteristics on being retested at room temperature.
Authors: Konstantin Vassilevski, Irina P. Nikitina, Praneet Bhatnagar, Alton B. Horsfall, Nicolas G. Wright, Anthony G. O'Neill, Michael J. Uren, Keith P. Hilton, A.G. Munday, A.J. Hydes, C. Mark Johnson
Abstract: 4H-SiC diodes with nickel silicide (Ni2Si) and molybdenum (Mo) Schottky contacts have been fabricated and characterised at temperature up to 400°C. Room temperature boron implantation has been used to form a single zone junction termination extension. Both Ni2Si and Mo diodes revealed unchanging ideality factors and barrier heights (1.45 and 1.3 eV, respectively) at temperatures up to 400°C. Soft recoverable breakdowns were observed both in Ni2Si and Mo Schottky diodes at voltages above 1450 V and 3400 V depending on the epitaxial structure used. These values are about 76% and 94% of the ideal avalanche breakdown voltages. The Ni2Si diodes revealed positive temperature coefficients of breakdown voltage at temperature up to 240°C.
Authors: Alton B. Horsfall, C.H.A. Prentice, Peter Tappin, Praneet Bhatnagar, Nicolas G. Wright, Konstantin Vassilevski, Irina P. Nikitina
Abstract: Although Silicon Carbide has become the material of choice for high power applications in a range of extreme environments, the interest in creating active chemical sensors requires the development of transistors for additional control circuits to operate in these environments. Despite the recent advances in the quality of oxide layers on SiC, the mobility of inversion layers is still low and this will affect the maximum frequency of the operation for these devices. We present simulation results which indicate that a delta channel, in both n-channel and p-channel structures, is suitable for transistors used with these low level signals. By varying the doping levels of the device we have shown that the optimum delta doping for this application is 1.43x1019 cm-3 for both n and p channel devices. We then show the effects of high temperatures on the delta FET devices and make comparisons with standard SiC MOSFET devices.
Authors: Peter Tappin, Rajat Mahapatra, Nicolas G. Wright, Praneet Bhatnagar, Alton B. Horsfall
Abstract: This report investigates the advantages of high-k materials as gate dielectrics for high power SiC trench MOSFET devices, by means of TCAD simulation. The study makes a comparison between the breakdown characteristics of gate dielectrics comprising SiO2, HfO2 and TiO2. I-V and Transfer functions show forward characteristics with on-state resistivity of 8.27 m*⋅cm2, 8.65 m*⋅cm2, 15.8 m*⋅cm2 for the respective devices, at a gate voltage of 20 V. The threshold voltage is 10 V for all devices. The blocking voltage for the HfO2 and TiO2 is increased from 1800 V (for the SiO2 device) to 2200 V. With a peak electric field of 12 MV/cm through the oxide of the SiO2 device is reduced to 3.2 MV/cm for the HfO2 and 2.3 MV/cm for the TiO2 devices.
Authors: T. Ganguli, B.L. Dashora, P. Bhattacharya, L.M. Kukreja, Praneet Bhatnagar, H.S. Rawat, M. Lal, A. Gupta
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