Papers by Author: Wei Qiang Zhang

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Authors: Wei Qiang Zhang, Li Su, Jun Wang, Bin Bin Liu, Jian Ping Hu
Abstract: Energy-recycling output pad cells for driving adiabatic chips are designed, which have been fabricated with Chartered 0.35um process and tested. The proposed energy-recycling output pad cells include mainly bonding pads, electrostatic discharge (ESD) protection circuits, and two stage energy-recycling buffers that are used to drive the large load capacitances on chip pads. The two stage energy-recycling buffers are realized using CPAL (Complementary Pass-transistor Adiabatic Logic) and PAL-2N (pass-transistor adiabatic logic with NMOS pull-down configuration), respectively. For comparison, a conventional output pad cell is also embedded in the test chip. The function verifications and energy loss tests for the three output pad cells are carried out. The energy consumption of the proposed two energy-recycling output pad cells has large savings over a wide range of frequencies, as compared with the conventional CMOS counterparts, since the energy on large load capacitances in the chip pads can be well recycled.
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Authors: Qun Deng, Wei Qiang Zhang, Jin Tao Jiang
Abstract: Along with the development of the aviation industry, HM sports get more and more attention, it was a very hot sport at home and abroad, the remote control technology of model aircraft is also have been developed. In the present model aircraft remote control systems, the antenna is usually dipole antenna, dipole antenna is larger, higher power consumption . In view of the above shortcomings, this paper proposes a way that using micro-strip antenna instead of the traditional antenna. Through the discussion of the microstrip antenna's working principle, this paper designed a microstrip antenna works in 2.4 GHz model aircraft remote control system. According to its actual application , the material, shape, and the type of the microstrip antenna are determined, and the size of the antenna is calculated by the equation and the software , then the model of the antenna is built and simulated in ADS, finally the best parameters are obtained through optimizing and matching to meets the requirements.
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Authors: Qun Deng, Wei Qiang Zhang
Abstract: Using the existing GSM network for location is currently a hot, but usually the system only can complete the location function, and could not communication with others. For the purpose of the voice communication between the mobile terminals in forklifts and the service center, this paper designed a new emergency call system to overcome the above disadvantages, and especially taken their applications into consideration.
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Authors: Wei Qiang Zhang, Li Su, Li Fang Ye, Jian Ping Hu
Abstract: The leakage dissipations of nano-circuits have become a critical concern. Estimating the leakage power of nano-circuits is very important in low-power design. This paper presents a new estimation technology for the active leakage dissipations of adiabatic logic circuits. Based on the power dissipation models of adiabatic circuits, active leakage dissipations are estimated by testing total leakage dissipations with additional capacitances on load nodes of the adiabatic circuits using HSPICE simulations. Taken as an example, the estimation for dynamic and active leakage power dissipations of CPAL (Complementary Pass-transistor Adiabatic Logic) circuits is demonstrated using the proposed estimation technology. The simulation results show that the proposed estimation technology can accurately estimate the active leakage dissipations of CPAL circuits with an accepted error over a wide range of frequencies.
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Authors: Wei Qiang Zhang, Yu Zhang, Jian Ping Hu
Abstract: With the decrease of the power supply voltage, the thickness of the gate oxide has been also scaled down in CMOS technologies using gate oxide materials. The leakage dissipation through the gate oxide is becoming an important component of power consumption in currently used nanometer CMOS processes without metal gate structure. Base on the fact that PMOS transistors have an order of magnitude smaller gate leakage than NMOS ones, this paper propose a P-type efficient charge recovery logic (P-ECRL) to reduce leakage dissipations in nanometer CMOS processes with gate oxide materials. For an example, a J-K flip-flop and a mode-10 counter using four-phase P-ECRL circuits are verified. All circuits are simulated using 90nm and 45nm CMOS processes with gate oxide materials. The proposed P-ECRL circuits show significant improvement in terms of power consumption over the traditional N-type ECRL counterparts.
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