Papers by Author: Bradley Heath

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Authors: Qing Chun Jon Zhang, Charlotte Jonas, Bradley Heath, Mrinal K. Das, Sei Hyung Ryu, Anant K. Agarwal, John W. Palmour
Abstract: SiC IGBTs are suitable for high power, high temperature applications. For the first time, the design and fabrication of 9 kV planar p-IGBTs on 4H-SiC are reported in this paper. A differential on-resistance of ~ 88 m(cm2 at a gate bias of –20 V is achieved at 25°C, and decreases to ~24.8 m(cm2 at 200°C. The device exhibits a blocking voltage of 9 kV with a leakage current density of 0.1 mA/cm2. The hole channel mobility is 6.5 cm2/V-s at room temperature with a threshold voltage of –6.5 V resulting in enhanced conduction capability. Inductive switching tests have shown that IGBTs feature fast switching capability at both room and elevated temperatures.
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Authors: Sei Hyung Ryu, Sumi Krishnaswami, Brett A. Hull, Bradley Heath, Fatima Husna, Jim Richmond, Anant K. Agarwal, John W. Palmour, James D. Scofield
Abstract: High temperature characteristics of 4H-SiC power JFETs and DMOSFETs are presented in this paper. Both devices are based on pn junctions in 4H-SiC, and are capable of 300oC operation. The 4H-SiC JFET showed very predictable, well understood temperature dependent characteristics, because the current conduction depends on the drift of electrons in the bulk region, which is not restricted by traps in the MOS interface or at the pn junctions. On the other hand, in a 4H-SiC DMOSFET, electrons must flow through the MOS inversion layer with a very high interface state density. At high temperatures, the transconductance of the device improves and threshold voltage shifts negative because less electrons are trapped in the interface states, resulting in a much lower MOS channel resistance. This cancels out the increase in drift layer resistance, and as a result, a temperature insensitive on-resistance can be demonstrated. The performance of the two devices are compared, and a discussion of issues for their high temperature application is presented.
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Authors: Sumi Krishnaswami, Sei Hyung Ryu, Bradley Heath, Anant K. Agarwal, John W. Palmour, Bruce Geil, Aivars J. Lelis, Charles Scozzie
Abstract: Gate oxide reliability measurements of 4H-SiC DMOSFETs were performed using the Time Dependent Dielectric Breakdown (TDDB) technique at 175°C. The oxide lifetime is then plotted as a function of the electric field. The results show the projected oxide lifetime to be > 100 years at an operating field of ~3 MV/cm. Device reliability of 2.0 kV DMOSFETs was studied by stressing the gate with a constant gate voltage of +15 V at a temperature of 175°C, and monitoring the forward I-V characteristics and threshold voltage for device stability. Our very first measurements show very little variation between the pre-stress and post-stress conditions up to 1000 hrs of operation at 175°C. In addition, forward on-current stressing of the MOSFETs show the devices to be stable up to 1000 hrs of operation.
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Authors: Sei Hyung Ryu, Sumi Krishnaswami, Brett A. Hull, Bradley Heath, Mrinal K. Das, Jim Richmond, Anant K. Agarwal, John W. Palmour, James D. Scofield
Abstract: 8 mΩ-cm2, 1.8 kV power DMOSFETs in 4H-SiC are presented in this paper. A 0.5 μm long MOS gate length was used to minimize the MOS channel resistance. The DMOSFETs were able to block 1.8 kV with the gate shorted to the source. At room temperature, a specific onresistance of 8 mΩ-cm2 was measured with a gate bias of 15 V. At 150 oC, the specific onresistance increased to 9.6 mΩ-cm2. The increase in drift layer resistance due to a decrease in bulk electron mobility was partly cancelled out by the negative shift in MOS threshold voltage at elevated temperatures. The device demonstrated extremely fast, low loss switching characteristics. A significant improvement in converter efficiency was observed when the 4H-SiC DMOSFET was used instead of an 800 V silicon superjunction MOSFET in a simple boost converter configuration.
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Authors: Brett A. Hull, Mrinal K. Das, Jim Richmond, Bradley Heath, Joseph J. Sumakeris, Bruce Geil, Charles Scozzie
Abstract: Forward voltage (VF) drift, in which a 4H-SiC PiN diode suffers from an irreversible increase in VF under forward current flow, continues to inhibit commercialization of 4H-SiC PiN diodes. We present our latest efforts at fabricating high blocking voltage (6 kV), high current (up to 50 A) 4H-SiC PiN diodes with the best combination of reverse leakage current (IR), forward voltage at rated current (VF), and VF drift yields. We have achieved greater than 60% total die yield onwafer for 50 A diodes with a chip size greater than 0.7 cm2. A comparison of the temperature dependent conduction and switching characteristics between a 50 A/6 kV 4H-SiC PiN diode and a commercially available 60 A/4.5 kV Si PiN diode is also presented.
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