Papers by Author: Hajime Okumura

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Authors: Dai Okamoto, Yasunori Tanaka, Tomonori Mizushima, Mitsuru Yoshikawa, Hiroyuki Fujisawa, Kensuke Takenaka, Shinsuke Harada, Shuji Ogata, Toshihiko Hayashi, Toru Izumi, Tetsuro Hemmi, Atsushi Tanaka, Koji Nakayama, Katsunori Asano, Kazushi Matsumoto, Naoyuki Ohse, Mina Ryo, Chiharu Ota, Kazuto Takao, Makoto Mizukami, Tomohisa Kato, Manabu Takei, Yoshiyuki Yonezawa, Kenji Fukuda, Hajime Okumura
Abstract: We successfully fabricated 13-kV, 20-A, 8 mm × 8 mm, drift-free 4H-SiC PiN diodes. The fabricated diodes exhibited breakdown voltages that exceeded 13 kV, a forward voltage drop of 4.9–5.3 V, and an on-resistance (RonAactive) of 12 mW·cm2. The blocking yield at 10 kV on a 3-in wafer exceeded 90%. We investigated failed devices using Candela defect maps and light-emission images and found that a few devices failed because of large defects on the chip. We also demonstrated that the fabricated diodes can be used in conducting high-voltage and high-current switching tests.
Authors: Kazutoshi Kojima, Hajime Okumura, Satoshi Kuroda, Kazuo Arai, Akihiko Ohi, Hiroyuki Akinaga
Abstract: Homoepitaxial growth was carried out on 4H-SiC on-axis substrate by horizontal hot wall chemical vapor deposition. By using carbon face substrate, specular surface morphology of a wide area of up to 80% of a 2-inch epitaxial wafer was obtained at a low C/Si ratio growth condition of 0.6. The Micropipe in on-axis substrate was indicated to be filled with spiral growth and to be dissociated into screw dislocations during epitaxial growth. It was found that the appearance of basal plane dislocations on the epitaxial layer surface can be prevented by using an on-axis substrate.
Authors: Yusuke Kobayashi, Shinsuke Harada, Hiroshi Ishimori, Shinji Takasu, Takahito Kojima, Keiko Ariyoshi, Mitsuru Sometani, Junji Senzaki, Manabu Takei, Yasunori Tanaka, Hajime Okumura
Abstract: A 3.3 kV trench MOSFET with double-trench structure was demonstrated. The deep buried p-base regions were fabricated using tilt angle ion implantation into the sidewalls of the trench contacts. The distance between the trench gate and trench contact was determined through simulation, in order to optimize the trade-off between on-resistance (RonA) and the electrical field in the oxide (Eox). A tapered trench was located in the connective area between the edge termination and the active area, in order to maintain breakdown voltage. We achieved a RonA of 10.3 mWcm2 and a breakdown voltage of 3843 V and the maximum Eox at breakdown voltage was estimated to be 3.2 MV/cm.
Authors: Yuuki Ishida, Mitsuhiro Kushibe, Tetsuo Takahashi, Hajime Okumura, Sadafumi Yoshida
Authors: Hitoshi Habuka, Yusuke Katsumi, Yutaka Miura, Keiko Tanaka, Yasushi Fukai, Takaya Fukae, Yuan Gao, Tomohisa Kato, Hajime Okumura, Kazuo Arai
Abstract: The etching technology for 4H-silicon carbide (SiC) was studied using ClF3 gas at 673-973K, 100 % and atmospheric pressure in a horizontal reactor. The etch rate, greater than 10 um/min, can be obtained for both the C-face and Si-face at substrate temperatures higher than 723 K. The etch rate increases with the increasing ClF3 gas flow rate. The etch rate of the Si-face is smaller than that of the C-face. The etched surface of the Si-face shows many hexagonal-shaped etch pits. The C-face after the etching is very smooth with a very small number of round shaped shallow pits. The average roughness of the etched surface tends to be small at the higher temperatures.
Authors: Kazutoshi Kojima, Tetsuo Takahashi, Yuuki Ishida, Satoshi Kuroda, Hajime Okumura, Kazuo Arai
Authors: Takeshi Mitani, Naoyoshi Komatsu, Tetsuo Takahashi, Tomohisa Kato, Toru Ujihara, Yuji Matsumoto, Kazuhisa Kurashige, Hajime Okumura
Abstract: We have investigated the solution growth under various Al-N co-doping conditions. Both p-type and n-type 4H-SiC were successfully grown under Al-N co-doping conditions, while using the effect of Al-addition to stabilize both growth surface and polytype. The doping and electrical properties were investigated systematically. Interaction between Al and N in the incorporation process and electrical property under heavily co-doped conditions were discussed.
Authors: Kazutoshi Kojima, Sachiko Ito, Junji Senzaki, Hajime Okumura
Abstract: We have carried out detailed investigations of 4H-SiC homoepitaxial growth on vicinal off-angled Si-face substrates. We found that the surface morphology of the substrate just after in-situ H2 etching was also affected by the value of the vicinal-off angle. Growth conditions consisting of a low C/Si ratio and a low growth temperature were effective in suppressing macro step bunching at the grown epilayer surface. We also demonstrated epitaxial growth without step bunching on a 2-inch 4H-SiC Si-face substrate with a vicinal off angle of 0.79o. Ni Schottky barrier diodes fabricated on an as-grown epilayer had a blocking voltage above 1000V and a leakage current of less than 5x10-7A/cm2. We also investigated the propagation of basal plane dislocation from the vicinal off angled substrate into the epitaxial layer.
Authors: Mitsuo Okamoto, Tsutomu Yatsuo, Kenji Fukuda, Hajime Okumura, Kazuo Arai
Abstract: From a viewpoint of device application using p-channel SiC MOSFETs, control of their channel properties is of great importance. We aimed to control the electrical properties of 4H-SiC p-channel MOSFETs through locating the p-type epitaxial layer at the channel area, so called “epi-channel MOSFET” structure. We varied the dopant concentrations and the thickness of the epi-channel layer, and investigated their electrical properties. In case of heavily doped epi-channel samples, the devices indicated “normally-on” characteristics, and their channel mobility decreased slightly in comparison with the inversion-type devices. As for lightly doped epi-channel samples, the subthreshold current increased with thickness of the epi-channel layer keeping their “normally-off” characteristics. Their channel mobility also increased with thickness of the epi-channel layer. The peak value of field effect channel mobility of the sample with 2.5 μm thickness and 5×1015 /cm3 dopant concentration epi-channel was 18.1 cm2/Vs.
Authors: Keiichi Yamada, Junji Senzaki, Kazutoshi Kojima, Hajime Okumura
Abstract: The new indicators, effective gate oxide thickness tc and effective gate electrode area D, and their combination are applied for a new analysis method of Fowler-Nordheim (F-N) tunneling characteristics in MOS capacitor having oxide thickness fluctuation. This method considering the conduction properties of F-N tunneling characteristics correlates its characteristics to the oxide reliability. These indicators quantified with the influence of the oxide thickness fluctuation can provide the net values of the electric field and the current density on the gate oxide. This new analysis method will lead to reducing the evaluation time for the reliability assessment.
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