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ISBN print: 978-3-0364-2124-7
ISBN eBook: 978-3-0364-3124-6
DOI book: 10.4028/b-ceWTZ6
© 2026 Trans Tech Publications Ltd, All Rights Reserved

Bulk and Epitaxial Growth of SiC

Edited by
Sang Mo Koo
Hoon Kyu Shin

Bulk and Epitaxial Growth of SiC

Special topic volume with invited peer-reviewed papers only

Edited by
Sang Mo Koo and Hoon Kyu Shin

𝐒𝐒 cientific.Net

Copyright © 2026 Trans Tech Publications Ltd, Switzerland

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Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp -1-0

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Accepted:
2026-05-14

Online:
2026-05-18

Preface

The original version of this paper is available on https://www.scientific.net/SSP.393.-1.pdf

Silicon carbide is one of the most important wide-bandgap semiconductor materials for advanced electronic and optoelectronic applications. Its exceptional physical and chemical properties, including a wide bandgap, high breakdown electric field, excellent thermal conductivity, and outstanding chemical stability, make SiC uniquely suited for applications in high-power, highfrequency, and high-temperature devices. With the growing demand for efficient energy conversion systems, electric vehicles, renewable energy technologies, and harsh-environment electronics, the development of high-quality SiC substrates and epitaxial layers has become a central focus in semiconductor materials research.

This special edition, Bulk and Epitaxial Growth of SiC, addresses the scientific and technological foundations underlying the production of silicon carbide crystals and device-quality epitaxial films. Bulk crystal growth techniques, particularly physical vapour transport, are discussed with emphasis on technological control, defect reduction, polytype stability, and process optimisation, all of which affect final device performance and reliability.

The collected articles provide an overview of the critical processes that enable the fabrication of next-generation SiC-based power electronics. By linking theoretical investigations with real engineering practice, these works highlight the progress and ongoing challenges in producing materials that meet increasingly stringent industrial requirements.

We hope that this edition will serve as a concise and valuable resource for researchers, engineers, and students working in semiconductor materials and technologies, and inspire further advances in this strategically important field.

Table of Contents

Preface

Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

Fu Sheng Zhang, Yong Liang Shao, Yong Zhong Wu, Bao Guo Zhang, Dong Shi, Hai Xiao Hu, Xiao Peng Hao

300 mm4H-SiC Crystal and Substrate Development

Ya Ni Pan, Chao Gao, Yu Zhou, Xiu Xiu Ning, Yin Li, Ying Guo, Hong Yu Peng, Yan Min Zong

Epitaxial Growth and Characterization of 4𝐇-SiC Layer on C-Face and Si-Face Substrates

Chiara Nania, Ruggero Anzalone, Domenica Raciti, Nicolò Piluso, Fabiana Vento, Cristiano Calabretta, Andrea Severino

Development of High Concentration Uniformity Epitaxial Growth on 200 mm 4H−SiC Wafers 

Wei Ning Qian, Fei Hong Huang, Jin An Li, Gan Feng, Jian Hui Zhao, Jun Yong Kang

Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

Michael Schley, Friedrich Schaaff, Jan Richter

Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

Tawhid Rana, Taskin Karim, Jonas P. Murphy, Sam Johnson, Nicolas Thierry-Jebali, Edward Sanchez

Solution Growth Technique of Silicon Carbide with In Situ Observation

Yoshihisa Abe, Akihisa Kawabe, J. Osada, K. Kurashige, H. Nakanishi, H. Ishibashi, Toru Ujihara

Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

Sven Strüber, Cristina Grazzi, Lucrezia Tana, Ole Schneider, Tobias Wagner, Jakob Wiedemann, P. Wunder, P. J. Wellmann

Application of a Fine Grain 3C-SiC Powder Source Material during PVT Growth of 4H-SiC Crystals

Julian Zöcklein, Sven Strüber, Cristina Grazzi, Nils Christian Arneberg, Tobias Straub, Siegmund Greulich-Weber, Peter J. Wellmann

Optimization of Seed Crystal Stability at the Initial Growth Stage Depending on Heating Ramp Rates and Gas Flow Channels of SiC Source Powder for Growth of 8-inch n-Type 4H-SiC Single Crystal

Chae Young Lee, Su Ho Kim, Jung Woo Choi, Myung Ok Kyun, Jung Gyu Kim, Kap Ryeol Ku, Yeon Suk Jang, Jung Gon Kim, Won Jae Lee

Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

Birgit Kallinger, Christian Gobert, Maximilian Titl, Robin Karhu, Johannes Köhler, Jürgen Erlekampf

Remote Epitaxy of SiC: Feasibility, Challenges, and Pathways

Misagh Ghezellou, Justinas Palisaitis, Jawad Ul-Hassan

Numerical Simulation of Optimal Source Temperature Distribution in PVT Method for SiC Single Crystals

Shota Tani, Masato Urakami, Wataru Saito, Shin Ichi Nishizawa

Keywords Index

Authors Index

The original version of this eBook is available on https://www.scientific.net/book/bulk-and-epitaxial-growth-of-sic/978-3-0364-3124-6

Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 1-5

doi: 10.4028/p-9Ysg3T

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-08-25

Revised:
2025-12-06

Accepted:
2026-02-28

Online:
2026-05-18

Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

The original version of this paper is available on https://www.scientific.net/SSP.393.1.pdf

Fusheng Zhang a*, Yongliang Shao b, Yongzhong Wu c, Baoguo Zhang d, Dong Shi e, Haixiao Hu f and Xiaopeng Hao g*

School of Materials Science and Engineering, Shandong Key Laboratory of Silicon Carbide Material, Qilu University of Technology (Shandong Academy of Science), Jinan 250353, China

a zfs@qlu.edu.cn, b  shaoyongliang@qlu.edu.cn, c  wuyz@qlu.edu.cn, d  zbg@qlu.edu.cn, e  shidong@qlu.edu.cn, f  huhaixiao@qlu.edu.cn, q  xphao@qlu.edu.cn

Keywords: basal plane dislocation, tantalum carbide coating, thermal gradient, defect reduction.

Abstract

Silicon Carbide ( SiC ) is a pivotal wide-bandgap semiconductor for high-power and highfrequency electronics. However, crystalline defects, particularly Basal Plane Dislocations (BPDs), severely degrade the performance and reliability of bipolar devices by nucleating stacking faults that cause fatal forward voltage drift. This work presents the successful growth of 8 -inch, 4∘ off-axis, ntype 4 H -SiC single crystals with significantly reduced BPD density via the Physical Vapor Transport (PVT) method using an improved reactor design. The key innovation involves replacing traditional graphite components with single or polycrystalline SiC for the seed holder and guide tube, subsequently coated with a thin ( 10μ m ) tantalum carbide ( TaC ) film. This design ensures thermal expansion coefficient matching and reduces thermal radiation emissivity. Etch pit density analysis revealed that the improved design reduced the overall BPD density from over 1027 cm−2 to a remarkably low 78 cm−2. Furthermore, it drastically improved the radial uniformity of BPD distribution by stabilizing the thermal gradient and suppressing parasitic polycrystalline nucleation, marking a critical advancement towards high-yield production of high-quality, large-diameter SiC substrates.

Introduction

The original version of this paper is available on https://www.scientific.net/SSP.393.1.pdf

The relentless pursuit of greater energy efficiency and miniaturization in power electronics has propelled the adoption of wide-bandgap semiconductors, among which SiC stands as a cornerstone material. Its superior properties, including a wide band gap ( ~3.26eV for 4H−SiC ), high thermal conductivity ( ~4.9 W/cm·K ), exceptionally high electric breakdown field ( ~3MV/cm ), and large saturated electron drift velocity, enable devices to operate at higher temperatures, voltages, and switching frequencies with lower losses than traditional silicon-based devices [1,2]. These characteristics make SiC indispensable for a new generation of power converters, electric vehicle powertrains, and renewable energy systems.
However, the performance and reliability of SiC-based devices, particularly bipolar devices like PiN diodes and Insulated Gate Bipolar Transistors (IGBTs), are critically sensitive to crystalline imperfections in the substrate. Among these defects, Basal Plane Dislocations (BPDs) are notoriously detrimental. While a significant portion (>90%) of BPDs from the substrate can be converted into less harmful Threading Edge Dislocations (TEDs) in the initial epitaxial layer, the remaining BPDs pose a severe threat [3]. A perfect BPD in the hexagonal SiC crystal structure can readily dissociate into two partial dislocations, with a single Shockley-type stacking fault (SF) forming between them [4]. Under the injection of charge carriers during device operation, these stacking faults can nucleate and expand, leading to a progressive increase in the forward voltage drop ( Vf drift), ultimately causing device failure [5].
The formation and distribution of BPDs during bulk crystal growth are heavily influenced by the thermo-mechanical environment within the PVT furnace. Non-uniform temperature gradients, thermal stress induced by mismatched coefficients of thermal expansion (CTE) between the crystal and crucible components, and parasitic nucleation can all promote BPD generation and clustering,
especially at the crystal's periphery. Therefore, controlling the thermal field is paramount to reducing BPD density and improving its uniformity. This study addresses this challenge by introducing a novel reactor design that fundamentally alters the thermal and chemical environment, enabling the growth of 8 -inch SiC crystals with record-low and highly uniform BPD densities, a vital step towards unlocking the full potential of SiC power devices.

The Critical Challenge of BPDs

The original version of this paper is available on https://www.scientific.net/SSP.393.1.pdf

To fully appreciate the significance of this work, one must understand the nature of the BPD problem. BPDs are line defects whose Burgers vector lies in the {0001} basal plane of the 4H−SiC crystal structure. Their danger lies not in their existence as perfect dislocations in the substrate, but in their behavior during device fabrication and operation. During the epitaxial or bulk growth process, the high temperatures can cause a perfect BPD (with a Burgers vector of 1/3<11−20> ) to dissociate into two partial dislocations (e.g., 1/3<10−10> and 1/3<01−10> ), creating a stacking fault ribbon in between [6]. This is a metastable configuration. When a bipolar device is forward-biased, electronhole pair recombination provides the energy necessary for these partials to move, expanding the stacking fault area. This expanding fault acts as a carrier recombination center, reducing minority carrier lifetime and increasing the series resistance of the device, manifesting as the well-documented Vf drift [5]. This degradation is irreversible and fatal to the device's long-term reliability.
Consequently, the target for high-performance, high-reliability bipolar devices is a substrate with a BPD density as close to zero as possible. The industry standard, often achieved through various insitu or ex-situ conversion techniques during epitaxy, is to reduce BPDs in the epilayer to below 0.1 cm−2. However, this process is far more effective if the starting substrate has a low and uniform BPD density to begin with. Eliminating the problem at its source-the bulk crystal growth stage-is the most robust and economically viable strategy for high-yield manufacturing.

[picture]

(a)

Figure 1. (a)

[picture]

(b)

Figure 2. (b)

Fig. 1. The schematic diagrams of (a) traditional design and (b) improved design.

Experimental Setup: Traditional vs. Improved Design

The original version of this paper is available on https://www.scientific.net/SSP.393.1.pdf

The bulk growth of 4H−SiC single crystals is predominantly conducted using the PVT method. In a typical PVT setup, a polycrystalline SiC source is sublimated at high temperatures ( >2200∘C ) in a sealed graphite crucible. The resulting vapor species are transported to a cooler seed crystal, where they condense and form a single-crystal boule.
The experimental work presented here involved a direct comparison between two crucible designs: Traditional Design (Fig. 1a): This configuration utilized a seed holder and a surrounding guide tube fabricated from high-purity graphite. Improved Design (Fig. 1b): This novel configuration replaced the graphite components with parts machined from solid polycrystalline SiC or high-purity singlecrystal SiC ( N -doping concentration:4.0-12.0E+19 atoms cm−3 ). Critically, these SiC-based components were then uniformly coated with a ~10μ m thick film of TaC via a CVD process. Using both designs, 8 -inch, n-type, 4∘ off-axis 4 H -SiC single crystals were grown under otherwise identical process conditions (temperature, pressure, growth rate) to ensure a fair comparison. The SiC single crystal grown through improved design are shown in Fig. 2a. After cutting, grinding and polishing, a 200 mm SiC wafer was obtained (Fig. 2b).

[picture]

Fig. 2. The Photos of (a) SiC crystal grown through improved design and (b) processed SiC wafer.

Fig. 2. The Photos of (a) SiC crystal grown through improved design and (b) processed SiC wafer.

Defect Characterization Methodology

The original version of this paper is available on https://www.scientific.net/SSP.393.1.pdf

To quantify and visualize the BPD density in the grown crystals, standard wet chemical etching was employed. Wafers sliced from the grown boules were subjected to molten Potassium Hydroxide (KOH) at a temperature of approximately 500∘C for several minutes. KOH etches the SiC crystal at a much higher rate at dislocation sites than in the perfect crystal, creating characteristic hexagonal etch pits that correspond to the locations of Threading Screw Dislocations (TSDs) and oval-shaped pits that correspond to BPDs.
The etched surfaces were then analyzed using the FabXLab optical microscope equipped with automated image recognition software. This system scans the wafer surface, identifies and classifies the etch pits based on their morphology and size, and calculates their areal density ( cm−2 ), providing a precise and statistically robust map of defect distribution across the entire wafer.

[picture]

Fig. 3. The distribution of BPDs density in SiC crystal grown in (a) traditional design and (b) improved design.

Fig. 3. The distribution of BPDs density in SiC crystal grown in (a) traditional design and (b) improved design.

Results: Dramatic Reduction in BPD Density

The original version of this paper is available on https://www.scientific.net/SSP.393.1.pdf

The results of the etch pit density (EPD) mapping were striking and unequivocal. Crystal from Traditional Design (Fig. 3a): The BPD density was measured to be as high as 1027 cm−2. More importantly, the distribution was highly non-uniform. The edge of the wafer showed a very high density of BPDs, forming a pronounced ring-of-fire pattern. While the central region exhibited a moderately lower density. This radial gradient is a classic signature of thermo-mechanical stressinduced defect generation.
Crystal from Improved Design (Fig. 3b): Conversely, the improved design yielded crystals with a markedly lower BPD density, averaging only 78 cm−2. This represents a reduction of more than an order of magnitude and a significantly more uniform radial distribution. The extreme clustering at the edge was eliminated, resulting in a wafer with consistent low defect density from center to edge.

Mechanism: The Role of Thermal Management and CTE Matching

The original version of this paper is available on https://www.scientific.net/SSP.393.1.pdf

The dramatic improvement in crystal quality can be attributed to the superior thermal and mechanical properties of the new crucible components.

Problems with the Traditional Graphite Design

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Coefficient of Thermal Expansion (CTE) Mismatch: Graphite has a CTE of ~4−6×10−6/K (in-plane), while 4 H -SiC has a CTE of ~4.2×10−6/K along the a-axis and ~4.7×10−6/K along the c-axis. While these values seem close, any slight mismatch, combined with the extreme temperature gradients (often 5−20∘C/cm ) during growth and cool-down, generates significant shear stress at the interface between the crystal and the holder. This stress is a primary driver for the nucleation and propagation of dislocations, particularly at the vulnerable edge of the growing crystal.
High Thermal Emissivity and Conductivity: Graphite has a high thermal radiation emissivity ( 0.7 0.8 ) and is a good thermal conductor. This leads to two issues: Firstly, it creates a steeper and potentially unstable lateral temperature gradient ( ∂2 T/∂x2 ) at the crystal's periphery. Secondly, it causes excessive heat loss through the walls, cooling the inner surface of the guide tube. This cooling promotes the unwanted condensation and parasitic nucleation of SiC polycrystals on the graphite surface. These parasitic crystals disrupt the vapor flow, create local hot spots, and further distort the thermal field, exacerbating the non-uniform stress and BPD formation at the crystal edge.

Advantages of the Improved SiC/TaC Design

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Perfect CTE Matching: By manufacturing the seed holder and guide tube from SiC (either poly or single crystal), their thermal expansion is perfectly synchronized with that of the growing SiC boule. This eliminates the interfacial shear stress caused by CTE mismatch during temperature changes, providing a much more stable and mechanically benign environment for crystal growth.
Low Emissivity TaC Coating: TaC is a refractory ceramic with a very low thermal radiation emissivity of approximately 0.3 . This coating acts as a thermal barrier. It reduces radial heat loss from the crystal and crucible assembly, leading to a flatter, more stable, and more axially symmetric thermal profile. A smaller second derivative of temperature ( ∂2 T/∂x2 ) means reduced thermal stress. Suppression of Parasitic Nucleation: The combination of a stable, hotter wall temperature (due to lower heat loss) and the chemical inertness of the TaC surface makes it extremely difficult for SiC vapor species to nucleate and form polycrystalline deposits on the guide tube. This maintains a clean, predictable vapor transport path and a consistent thermal field throughout the long growth process. In essence, the improved design transforms the growth environment from one prone to fluctuations and steep gradients (traditional) to one that is stable, uniform, and minimally stressful (improved). This directly translates to a reduction in the driving force for dislocation generation and multiplication, yielding a crystal with far fewer defects and exceptional radial uniformity.

Summary

The original version of this paper is available on https://www.scientific.net/SSP.393.1.pdf

This study achieved a significant reduction in harmful BPDs in 8-inch 4H-SiC crystals by innovating the PVT reactor design. Traditional graphite components (seed holder and guide tube) were replaced with SiC-based parts coated with a thin TaC layer. This modification eliminated thermal expansion mismatch stress and stabilized the thermal gradient due to TaC's low emissivity, thereby suppressing parasitic nucleation. Results confirmed an order-of-magnitude reduction in average BPD density, from 1027 cm−2 to just 78 cm−2, while drastically improving radial uniformity by eliminating edgeclustering defects. This work provides a highly effective method for producing high-quality, largediameter substrates, directly addressing the major bottleneck for reliable SiC bipolar power devices and facilitating their broader industrial application.

References

The original version of this paper is available on https://www.scientific.net/SSP.393.1.pdf

Choyke, W. J., and G. Pensl. Physical properties of SiC, Mrs Bulletin, 22.3 (1997): 25-29.

Kimoto T., Cooper J. A., Fundamentals of Silicon Carbide Technology: Growth, Characterization, Devices, and Applications, Wiley, 2014.

Bergman J P, Lendenmann H, Nilsson P Å, et al., Crystal Defects as Source of Anomalous Forward Voltage Increase in 4H-SiC Diodes, Materials Science Forum, 353(2001).

T Stahlbush, Robert E., et al. Evolution of basal plane dislocations during 4H-SiC epitaxial growth. Materials Science Forum, 600(2009).

Stahlbush, R. E., et al. Effects of basal plane dislocations on SiC power device reliability. 2018 IEEE International Electron Devices Meeting (IEDM). IEEE, 2018.

Pirouz, Pirouz, and Augustinas Galeckas. Degradation of SiC bipolar devices: a review of likely causes and recent advances in its understanding. ECS Transactions, 41.8 (2011): 225.

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The original version of this eBook is available on https://www.scientific.net/book/bulk-and-epitaxial-growth-of-sic/978-3-0364-3124-6

Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 7-13

doi: 10.4028/p-L2E5l7

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-09-09

Revised:
2025-12-12

Accepted:
2026-02-23

Online:
2026-05-18

300 mm4H-SiC Crystal and Substrate Development

The original version of this paper is available on https://www.scientific.net/SSP.393.7.pdf

Yani Pan 1,a, Chao Gao 1, b*, Yu Zhou 1,c, Xiu Xiu Ning 1, d, Yin Li 1,e, Ying Guo 1,f, Hong Yu Peng 1,g, Yanmin Zong 1,2,h

1 SICC Co., Ltd, Jinan 250000, China.

2 Shandong Provincial Key laboratory of Silicon Carbide Materials, Jinan 250000, China.

a  panyani@sicc.cc, b  gaochao@sicc.cc, c  zhouyu@sicc.cc, d  ningxiuxiu@sicc.cc, eliyin@sicc.cc, f  guoying@sicc.cc, g  penghongyu@sicc.cc, h  zym@sicc.cc,

Keywords: 300 mm 4 H -SiC crystal, Crystal diameter expansion, 12-inch 4H-SiC substrate, thermal stress, radial temperature gradient.

Abstract

The development of integrated circuits (IC) is mainly driven by the advanced processes and increased silicon wafer diameter in the past several decades. It is technically believed that the diameter of 300 mm for SiC wafer is too difficult to be achieved since SiC crystal diameter expansion is a long and tough process, the growth process of which is different from that of silicon crystal. Herein, we demonstrate the diameter expansion process of SiC crystal from 200 mm to 300 mm using physical vapor transportation (PVT) method and show the world's first 300 mm4H−SiC single crystal substrate with 100%4H polytype. The driving force of crystal diameter expansion and resultant thermal stress are discussed in this paper. Based on the successful preparation of 300 mm SiC seed crystal, 12-inch high-purity, conductive n-type & p-type SiC substrates are subsequently fabricated. Quality characterization of the 300 mm SiC substrate shows very low micropipe and threading screw dislocation density below 0.05 cm−2 and 120 cm−2, respectively. Furthermore, both 500μ m and 750μ m thickness substrates are fabricated with bow and warp values lower than 10μ m and 30μ m, indicating high quality 300 mm substrates applicable in power devices and other emerging areas.

Introduction

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4H−SiC is one of the most important and promising semiconductor materials due to its excellent electrical, thermal, mechanical and optical properties[1]. Semi-insulating SiC substrates are now used to fabricate radio frequency devices applied in 5G station, while conductive SiC substrates are used in powder devices which plays important roles in electrical vehicles (EVs), photovoltaics (PVs) etc. Meanwhile, new SiC applications such as waveguide in AR glasses and interposer in advanced packaging[2] are emerging which require even larger diameter SiC substrates. Obtaining the first 300mm SiC substrate requires fabricating a starting 300 mm SiC seed crystal through diameter expansion-a process that is particularly challenging in PVT growth due to the frequent occurrence of polycrystal/defect formation and crystal stress during the multiple dynamic stages of crystal enlargement[3,4]. To suppress crystal breakage and polytype formation during SiC crystal diameter expansion, multiple runs of diameter expansion processes is necessary to obtain enlarged crystal diameter. This requires continuously new designs of crystal growth chamber, thermal field, growth process, wafering tools and processes since each iteration generates new crystals with non-standard diameters (e.g. 260 mm ).
Herein, we demonstrate successfully prepared 300 mm SiC substrates through diameter expansion process from 200 mm to 300 mm . Lateral growth of SiC crystal driven by the radial temperature gradient (RTG) is elaborated, where maximum growth diameter expansion and minimum residual thermal stress are well balanced[5,6,7]. The quality of 300 mm SiC substrates are characterized with Raman microscopy and Synchrotron X-ray Topography. Furthermore, 300 mm high-purity and conductive n&p type SiC substrates are shown in this paper.

Experiment

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To simulate SiC crystal growth process and calculate the temperature distribution in the growth chamber, commercial STR_VR software is adopted[8]. The software is also used to analyze the thermal stress in the grown SiC crystal in the models. Based on the thermal field and crystal thermal stress analysis, temperature gradient and chamber structure used for each run of crystal diameter expansion are developed and optimized.
4H−SiC crystals in the diameter expansion process are grown with PVT method. The growth temperature and pressure are set at 2000−2300∘C and 5−50mbar respectively. Nitrogen and argon are introduced into the growth chamber as doping and protective gases[9]. A self-produced 200 mm4H− SiC seed crystal with 4∘ off-cut is used at the beginning of crystal diameter expansion process. After each run of crystal growth, newly grown SiC crystal with expanded diameter is fabricated into seed crystal used in the next generation. Meanwhile, the internal structure of crystal growth chamber and the external insulation structure have been modified at each generation[10,11]. Simultaneously, corresponding wafering tools are also customized for this process.

Results and Discussion

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It's crucial to set up proper temperature gradients to drive the crystal grow in both radial and axial direction in SiC crystal diameter expansion process. Theoretically, larger RTG is preferred for lateral growth, however, a large RTG will inevitably introduce thermal stress in crystal which leads to the formation of defects or even crystal breakage. On the other hand, a small RTG will not drive monocrystal grow efficiently and polycrystal may appear in the periphery instead. Therefore, it is of great importance to balance temperature gradient and thermal stress during the continuous diameter processes.

[picture]

Fig. 1. (a) Calculation of SiC crystal thermal stress under different conditions, (b) Constant diameter crystal growth, (c) Diameter expansion crystal growth.

Fig. 1. (a) Calculation of SiC crystal thermal stress under different conditions, (b) Constant diameter crystal growth, (c) Diameter expansion crystal growth.

Based on the discussion above, the design of the crystal diameter expansion process is schematically shown in Fig.1. Different from the constant diameter crystal growth (CDCG) process, a tilt angle in the crystal growth periphery and corresponding RTG is designed in expanded diameter crystal growth (EDCG), which allows crystal diameter to increase gradually at the start of crystal growth. Fig. 1 (a) shows the calculation of the crystal thermal stress of CDCG and EDCG process (Fig. 1 (b) and (c)), respectively. Calculation results indicate that crystal thermal stress increases with thickness due to
the stress accumulation. Even with the same temperature gradient, SiC crystal diameter expansion process has larger thermal stress in the crystal from the start of the growth, and its stress increasing rate is almost twice of that in constant-diameter grown crystal. The calculation result in Fig. 1 indicates that the maximum RTG should be carefully designed according to the thermal stress in the diameter expanded crystal.
In order to further illustrate the correlation between lateral driving force and crystal thermal stress, different RTG curve is set on the seed surface to perform diameter expansion growth by modifying the thermal field structure (Fig. 2 (a)). Thermal stress distribution in grown crystal and corresponding RTG curve along the radial direction on the seed crystal surface are shown in Fig.2(b) and (c) respectively. As shown in Fig. 2 (c), RTG value is larger at the edge of crystal compared to that in the center, which facilitates the lateral growth of the crystals while maintaining relatively small stress in the entire crystal lattice. Calculated thermal stress in the diameter expansion area of the crystal is marked by the red dotted box in Fig. 2 (b), which is in good correlation with the plot of the RTG.

[picture]

Fig. 2. (a) Schematic illustration of diameter expansion crystal. (b) The distribution of the thermal stress in crystal. (c) The RTG curve at seed crystal surface.

Fig. 2. (a) Schematic illustration of diameter expansion crystal. (b) The distribution of the thermal stress in crystal. (c) The RTG curve at seed crystal surface.

A suitable temperature gradient range should be derived for various diameter of crystals. A tougher balance between temperature gradient and crystal stress is speculated with diameter increasing in the EDCG process, as shown in Fig. 3 (a). The best scheme for a successful crystal diameter expansion process should be the optimized combination of enlarged diameter, temperature gradient and thermal stress. Theoretically, free-style crystal growth without constraints in diameter is beneficial for both diameter enlargement and quality control. However, the actual situation is that hexagonality of 4H− SiC and the distribution of vapor species lead to much larger convexity, causing larger thermal stress with less effective diameter enlargement. To resolve this problem, a tilt graphite ring which guides crystal growth with expansion angle ( θ ) is applied. The correlation between θ and thermal gradient can be expressed as,

θ=arctanGrGa.(1)

where Gr is radial temperature gradient and Ga is axial temperature gradient. During crystal growth, the expansion angle θ depends on the other two parameters and a desirable diameter increase can be realized by adjusting Gr and Ga. Furthermore, curve fitting between the increase of crystal diameter (d) and temperature gradient ( Gr/Ga ) in Fig. 3 (b) is derived as below,

d=115.3GrGa−13.16(2)

When the Gr/Ga value exceeds 0.25 , an effective monocrystal diameter expansion larger than 15 mm can be achieved. which comes with a high ratio of crystal breakage (Fig. 3 (c)) caused by thermal stress. If Gr/Ga value is set to be smaller than 0.15 , insufficient driving force will lead to extremely slow monocrystal growth in radial direction, resulting in polycrystal deposition (Fig.3(d)). Then, RTG value in the range of 0.7~2.4∘C/cm and diameter expansion angle in the range of 8∘~14∘ is set up. In order to achieve desirable crystal diameter expansion at different process nodes, it is important to design corresponding crucibles, insulation structures and RTG values based on the achieved diameter of the seed crystal. Therefore, various thermal field structures and temperature gradient are designed for each iteration of EDCG process.

[picture]

Fig. 3. (a) Calculation of the thermal stress during crystal expansion process. (b) The correlation between the effective expansion diameter of the crystal, the edge Gr/Ga value and guide tube angle. (c) Cracked crystals. (d) Crystal peripheral region with failed expansion.

Fig. 3. (a) Calculation of the thermal stress during crystal expansion process. (b) The correlation between the effective expansion diameter of the crystal, the edge G r / G a value and guide tube angle. (c) Cracked crystals. (d) Crystal peripheral region with failed expansion.

Based on theoretical analysis and crystal growth experiments, SiC crystal diameter is successfully enlarged from 200 mm to 300 mm . Each generation of expanded SiC crystal, fabricated SiC substrates and the eventually obtained 300 mm SiC crystal and substrate are shown in Fig.4. As the 300 mm SiC seed substrates are ready, CDCG process is carried out for 300 mm SiC crystal growth. As shown in Fig. 5, high-purity and conductive n-type & p-type SiC substrates are successfully fabricated, which covers all series of SiC substrates and all areas in which SiC material can be adopted.

[picture]

Fig. 4. SiC crystals and corresponding substrates with various diameter during expansion process.

Fig. 4. SiC crystals and corresponding substrates with various diameter during expansion process.

[picture]

Fig. 5. Images of fabricated 12 inch n-type SiC substrate, 12 inch high-purity SiC substrate and 12 inch p-type SiC substrate.

Fig. 5. Images of fabricated 12 inch n-type SiC substrate, 12 inch high-purity SiC substrate and 12 inch p-type SiC substrate.

The polytype and thermal stress of the 300 mm SiC substrate are characterized using micro-Raman. Fig. 6 (a) shows a FTO (2/4) E2 peak locates at 776−777 cm−1, which is the typical 4H−SiC crystal. Mapping data (Fig. 6 (b)) of the whole 300 mm substrate shows consistent 776.5 cm−1 Raman spectrum peak, indicating that the 300 mm SiC substrate is 100%4H polytype. Additionally, negilible peak shift is observed at 776.5 cm−1 in the Raman spectrum, indicating that the thermal stress is small in 300 mm substrate since Raman spectrum is sensitive to the crystal lattice strain[12]. Calculation from the spectrum shift results in a typical stress value of 3.5 MPa , which is comparable to the current 200 mm SiC substrates. Fig. 6 (c) further shows the threading screw dislocation (TSD) density characterization by XRT. Average micropipe and TSD density in the 300 mm n type 4H-SiC substrate is measured to be less than 0.05 cm−2 and 120 cm−2, this almost replicates the TSD density of initial 200 mm4H−SiC seed substrate when diameter expansion process started, which further shows the diameter expansion process is well designed without deteriorating the initial crystal quality.

[picture]

Fig. 6. Raman and XRT characterization of the 300 mm4H−SiC substrates.

Fig. 6. Raman and XRT characterization of the 300 m m 4 H − S i C substrates.

One concern of 300 mm SiC substrates is the warpage increase. Fig. 7 shows the typical values of fabricated 750μ m SiC substrates, in which the bow and warp values are controlled well below 10μ m and 30μ m, respectively. Besides, the total thickness variation (TTV) value is controlled below 6μ m, which indicates applicable substrates for device fabrication process.

[picture]

Fig. 7. Wafering quality characterization of 750μ m thickness 300 mm4H−SiC substrates

Fig. 7. Wafering quality characterization of 750 μ m thickness 300 m m 4 H − S i C substrates

Summary

The original version of this paper is available on https://www.scientific.net/SSP.393.7.pdf

The first 300 mm 4H-SiC substrates is demonstrated in November 2024 by SICC. Detailed diameter expansion process of 4H−SiC crystals from 200 mm to 300 mm is shown in this paper. Correlation between the temperature gradient and thermal stress as well as the process window for successful diameter expansion process is elaborated based on simulation and experiments. Based on the expansion obtained 300 mm 4H-SiC seed, high quality 300 mm high-purity and conductive n-type & p-type SiC substrates are subsequently fabricated. The 300 mm SiC substrate is 100%4H polytype with TSD density below 120 cm−2. Substrates with both thickness 500μ m and 750μ m are fabricated with bow and warp values smaller than 10μ m and 30μ m, respectively. High quality of 300 mm SiC substrates will support future development of power devices, waveguide in AR glass as well as thermal management in advanced packaging.

References

The original version of this paper is available on https://www.scientific.net/SSP.393.7.pdf

Wellmann, P. J., Arzig, M., Ihle, J., Kollmuss, M., Steiner, J., & Mauceri, M., et al. "Review of Sublimation Growth of SiC Bulk Crystals," Materials Science Forum. (2022).

Chen, Boqu, et al. "Ultra-Thin, Ultra-Light, Rainbow-Free AR Glasses Based on Single-Layer Full-Color SiC Diffrcative Waveguide," (2024).

Hahn, Peter O. "The 300 mm silicon wafer-a cost and technology challenge," Microelectronic Engineering. 56(1/2), 3-13 (2001).

Yang, X.L., Pan, Y.N., Gao, C., Liang, Q.R., Wang, L.P., et al. "Development of High Quality 8 inch 4H-SiC Substrates," Solid State Phenomena. 344, 41-46 (2023).

Miyazaki, K, et al. "Effect of crucible thermal conductivity on dislocation distribution in crystals in a silicon carbide physical vapor transport furnace," Journal of Crystal Growth. 603, (2023).

Choi, Jung Woo, et al. "Modified Hot-Zone Design for Large Diameter 4H-SiC Single Crystal Growth," Materials Science Forum. 963, 18-21 (2019).

Steiner, Johannes, and P. J. Wellmann. "Impact of Mechanical Stress and Nitrogen Doping on the Defect Distribution in the Initial Stage of the PVT Growth Process," Materials (Basel, Switzerland) 15, 5 (2022).

Ha, Minh Tan, and S. M. Jeong. "A review of the simulation studies on the bulk growth of silicon carbide single crystals." Journal of the Korean Ceramic Society, 2, 59 (2022).

Hu, S., Liu, Y., Cheng, Q., Chen, Z., Tong, X., & Raghothamachar, B., et al. "Investigation of defect formation at the early stage of PVT-grown 4H-SiC crystals," Journal of Crystal Growth. 628 (2024).

Xu B., Han X.F., Xu S.C., et al., "Optimization of the Thermal Field of 8-Inch SiC Crystal Growth by PVT Method with "3 Separation Heater Method," SSRN Electronic Journal. (2023).

Yang N., Song B., Wang W., et al. "Control of the temperature field by double induction coils for growth of large-sized SiC single crystals via the physical vapor transport technique," (2022)

Chen P.C., Miao W.C., Ahmed T., et al. "Defect Inspection Techniques in SiC," Nanoscale Research Letters. 17, 30 (2022).

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Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 15-20

doi: 10.4028/p-z4K8Ju

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-09-10

Revised:
2026-01-21

Accepted:
2026-01-31

Online:
2026-05-18

Epitaxial Growth and Characterization of 4𝐇-SiC Layer on C-Face and Si-Face Substrates

The original version of this paper is available on https://www.scientific.net/SSP.393.15.pdf

Chiara Nania 1,a*, Ruggero Anzalone 1, b, Domenica Raciti 1,c, Nicolò Piluso 1, d, Fabiana Vento 1,e, Cristiano Calabretta 1,f and Andrea Severino 1, g

1 STMicroelectronics, Stradale Primosole, 50, Catania 95100, Italy

a* chiara.nania@st.com, b  ruggero.anzalone@st.com, c  domenica.raciti@st.com, d  nicolo.piluso@st.com, efabiana.vento@st.com, f  cristiano.calabretta01@st.com, g  andrea.severino@st.com

Abstract

H}-\mathrm{SiC}) is a wide-bandgap semiconductor that has become essential for power electronics due to its large bandgap, high critical electric field, and excellent thermal stability. Within the {0001} basal orientation, the two polar surfaces - Si-face and C-face - exhibit distinct behaviours during chemical vapor deposition (CVD) homoepitaxy, with direct implications for device performance and manufacturing. In this work, n-type epitaxial layers were deposited on 150 mm,4∘ off-axis Si-face and C-face substrates under identical conditions in a single-wafer hot-wall LP-CVD reactor ( T>1600∘C,P=3.0kPa,C/Si=1.05, silane/propane/ethylene precursors, N2 doping, HCl additive). Characterization analysis revealed pronounced polarity-dependent differences. AFM analysis showed that C-face epilayers exhibited smoother surfaces and reduced step bunching compared with Si-face layers. Optical and photoluminescence inspections show polarity-dependent defect propagation, with the C-face displaying reduced replication of extended defects under the explored conditions. However, nitrogen incorporation on the C-face orientation was more than 25× higher than Si-face orientation and displayed poor uniformity, highlighting the limited effectiveness of site-competition epitaxy on this orientation. In contrast, the Si-face provides tighter control of doping concentration and lateral uniformity, albeit with higher step bunching and rougher surfaces. These findings emphasize a fundamental trade-off in 4H−SiC homoepitaxy: the C -face offers morphological and structural advantages, while the Si -face ensures superior doping control and process stability. A deeper understanding of these polarity-dependent mechanisms is essential to optimize epitaxial growth strategies and to enable the design of high-performance SiC power devices.

Keywords: 4H−SiC, LP-CVD, epitaxial growth, defectivity, surface roughness, N2 incorporation.

Introduction

The original version of this paper is available on https://www.scientific.net/SSP.393.15.pdf

Silicon carbide ( SiC ), and notably the 4 H polytype, has emerged in the power semiconductor market due to its excellent physical properties, such as wide bandgap and high electrical breakdown field, which make it ideal for high-power, high-frequency and high-temperature applications. Among the different crystallographic orientations of 4H−SiC, the {0001} plane has two distinct polar faces: the Si -face (silicon termination) and the C -face (carbon termination). Although the Si -face is currently the most widely used in industrial production and research, the C-face exhibits structural and chemical features making it of growing interest, especially regarding the epitaxial growth and performance of MOS (metal-oxide-semiconductor) structures [1,2].

From an epitaxial growth perspective, the two polarities show markedly different behaviours. The Si-face has been extensively studied and optimized, largely because it offers a relatively wide process window for step-flow homoepitaxy under chemical vapor deposition (CVD), particularly when off-axis substrates are used to suppress polytype inclusions [3-5]. The introduction of chlorinated chemistries (e.g., HCl , dichlorosilane, methyltrichlorosilane) has further stabilized
growth on the Si-face, enabling high growth rates (up to ~100μ m/h ) while suppressing silicon droplet formation and 3C-SiC inclusions. The C-face, on the other hand, is characterized by a higher chemical reactivity and faster etching in hydrogen ambient, which can result in smoother step structures and lower surface roughness compared to the Si -face under optimized conditions. These characteristics are also linked to differences in step bunching behaviour, terrace stability, and surface free energy.

Defect formation is another crucial factor distinguishing the two polarities. On Si-face substrates, triangular defects and inclusions of 3C-SiC are typical, although several strategies involving growth rate optimization, C/Si ratio control, and Cl -based chemistry have been developed to mitigate them. In contrast, the C-face has been reported to promote lower replication of basal plane dislocations (BPDs) and a higher probability of their conversion into threading edge dislocations (TEDs), which is beneficial for device reliability, particularly in bipolar devices where BPDs are known to degrade performance. However, the C -face remains more susceptible to 3C inclusions when growth parameters are not tightly controlled, and its epitaxial layers may suffer from non-uniformities at very high growth rates [5, 6].

Doping incorporation is strongly polarity-dependent. As well known, nitrogen incorporation is more efficient on the C-face, leading to higher and less controllable background doping levels compared to the Si-face under identical conditions. This behaviour has been linked to differences in surface kinetics and adsorption mechanisms, with simulations suggesting that the Si-face exhibits a stronger dependence on the C/Si ratio and growth temperature, whereas the C-face is governed by more complex surface-chemistry interactions. Aluminium incorporation ( p-type doping) is also influenced by polarity, with distinct activation energies and incorporation pathways reported on the two surfaces. These differences make doping control on the C-face more challenging, despite its potential advantages in structural quality [7,8].

Finally, the SiO2/SiC interface quality is another critical parameter. The Si-face generally provides more stable and lower-defect-density MOS interfaces, while the C-face, although exhibiting a significantly faster oxidation rate (approximately an order of magnitude higher), typically shows higher interface trap densities and degraded channel mobility [7, 9]. Nevertheless, the unique chemical and structural features of the C-face suggest that, with improved understanding of epitaxial mechanisms and interface engineering, it could open new opportunities for enhancing MOS performance, particularly in applications where high mobility is essential.

Experiment Set-Up

The original version of this paper is available on https://www.scientific.net/SSP.393.15.pdf

In order to obtain a systematic and direct comparison of the effects of crystallographic polarity on the homoepitaxial growth of 4H−SiC, with particular attention to their relevance in the fabrication of power electronic devices, n-type epitaxial layers were grown on 150 mm substrates, cut at 4∘ offaxis, with opposite polar terminations (Si-face and C-face). Both surfaces of the {0001} basal plane, although being of great technological interest, are known to exhibit substantial differences in terms of surface energy, chemical reactivity, and dopant incorporation mechanisms. Understanding these differences under controlled and comparable experimental conditions is therefore crucial to defining the advantages and limitations of each orientation in epitaxy for industrial applications. To ensure that the observed variations could be attributed solely to the substrate polarity, all other process parameters - growth temperature, reactor pressure, precursor flows, C/Si ratio, and dopant flow were kept constant in all depositions.

Growth

The original version of this paper is available on https://www.scientific.net/SSP.393.15.pdf

Growth was carried out in a single-wafer hot-wall LP-CVD reactor at temperature above 1600∘C, a total pressure of 3.0 kPa , and a fixed C/Si ratio of 1.05. Silane (SiH4), propane (C3H8), and
ethylene (C2H4) were employed as silicon and carbon precursors, with nitrogen (N2) introduced as the dopant to achieve n-type conductivity and hydrogen (H2) as carrier gas. Hydrogen chloride (HCl) was added to suppress silicon droplet formation on the growing surface.

The target epilayer specifications, consistent with requirements for medium- and high-voltage devices, included a thickness of approximately 9.5μ m and a doping concentration of ~6×1016 cm−3.

A total of six epitaxial runs were performed - three on Si-face and three on C-face substrates allowing a controlled assessment of growth morphology, defectivity, and dopant incorporation as a function of crystallographic polarity.

Characterization

The original version of this paper is available on https://www.scientific.net/SSP.393.15.pdf

The thickness and doping concentration distribution in the epitaxial layers, expressed as [maximum value - minimum value]/mean [%], was assessed using Fourier Transform Infrared (FTIR) spectrometry and Mercury-Probe Capacitance Voltage (Hg-CV), respectively.

The defectivity characterization was conducted using Candela and Altair tools, both from KLA. The Candela tool uses highly sensitive optical technology able to simultaneously measure scattering intensity at various angles of incidence, topographic variations, surface reflectivity and phase shift, and photoluminescence for the detection and classification of crystallographic defects as stacking faults. A simultaneous Bright-field and Dark-field optical path to capture a variety of defects in the sub-micron to 5 -micron range is used in the Altair optical microscope. The surface roughness was tested by Atomic Force Microscopy (AFM).

AFM analysis highlights substantial morphological differences between the two polarities. On the Si-face, epitaxial growth exhibits a pronounced tendency toward step bunching, which results in a significant increase in surface roughness compared to that measured on the C-face. Moreover, surface roughness on the Si-face is not uniform across the wafer diameter: greater roughness is observed towards the edges, caused by thermal gradients and precursor flow distribution within the reactor (Fig. 1). Conversely, growth on the C-face produces more regular surfaces, characterized by lower roughness and the absence of macroscopic step bunching. This difference is attributable to the higher chemical reactivity of the carbon termination, which promotes more isotropic growth. However, this enhanced reactivity is coupled with greater susceptibility to the formation of point defects, limiting the ability to achieve electrically uniform and well-controlled epilayers.

[picture]

Fig. 1. AFM images of 4H−SiC epitaxial layers grown at same growth conditions on 4∘ off-axis C face and Si -face substrates in two different wafer position (center and edge). Scan size is 5×5e20×20μ m2, respectively, for the samples.

Fig. 1. AFM images of 4 H − S i C epitaxial layers grown at same growth conditions on 4 ∘ off-axis C face and Si -face substrates in two different wafer position (center and edge). Scan size is 5 × 5 e 20 × 20 μ m 2 , respectively, for the samples.

Defectivity inspections further confirmed the crystallographic polarities dependence of epitaxial quality. Samples grown on C-face substrates exhibit higher density of triangular defects than their counterparts deposited on Si-face substrates. These triangular features, associated with stacking faults and local lattice instabilities, originate from the enhanced chemical reactivity and the less controlled growth dynamics typical of carbon termination. The higher incidence of these defects on the C-face represents a significant limitation in terms of application, as it can compromise the electrical stability of the epilayers, inducing preferential leakage paths, and reducing the reliability of power devices manufactured on this orientation.

In addition to morphological and defectivity differences, doping incorporation strongly depends on polarity. Despite identical epitaxial growth conditions - including precursor fluxes, dopant flow, and C/Si ratio - the nitrogen concentration in layers grown on the C-face was found to be more than 25 times higher than in those grown on the Si-face, significantly exceeding the target value. This discrepancy is linked to the distinct surface structure and higher reactivity of the C-face, which make nitrogen incorporation far less controllable. On the Si-face, the site competition mechanism between carbon and nitrogen allows the C/Si ratio to effectively modulate dopant incorporation, leading to more reproducible and uniform doping profiles. In contrast, nitrogen on the C-face incorporates more readily and non-selectively, irrespective of the C/Si ratio. As a result, the doping distribution on the C-face shows greater dispersion and irregularity, whereas the Si-face displays a flatter and more controlled profile (Fig. 2). By comparison, the thickness distribution appears unaffected by polarity, showing no measurable difference between C -face and Si -face growth.

[picture]

Fig. 2. The left graph depicts the doping distribution, normalized against the target value ( ~6×1016 cm−3 ), along the wafer diameter grown on the C -face (in orange) and Si -face (in blue) 4H−SiC, respectively. Doping distribution maps for growth on the Si and C -face are displayed on the right.

Fig. 2. The left graph depicts the doping distribution, normalized against the target value ( ~ 6 × 10 16 c m − 3 ), along the wafer diameter grown on the C -face (in orange) and Si -face (in blue) 4 H − S i C , respectively. Doping distribution maps for growth on the Si and C -face are displayed on the right.

Summary/Conclusion

The original version of this paper is available on https://www.scientific.net/SSP.393.15.pdf

The comparative study of 4H−SiC homoepitaxy on Si - and C -face substrates demonstrates a clear polarity-dependent trade-off. The C -face enables smoother surfaces and reduced step bunching, suggesting potential advantages for structural quality and defects mitigation. However, it suffers from excessive and poorly controllable nitrogen incorporation, resulting in poor doping uniformity. The Si-face, while yielding rougher surfaces, offers superior doping control through site-competition mechanisms, making it more suitable for device-oriented epitaxy where doping precision is critical. These results emphasize the need for polarity-specific growth strategies and provide insights into optimizing epitaxial processes for next-generation SiC power devices.

References

The original version of this paper is available on https://www.scientific.net/SSP.393.15.pdf

T. Kimoto and J. A. Cooper, Fundamentals of Silicon Carbide Technology: Growth, Characterization, Devices and Applications. Hoboken, NJ, USA: Wiley-IEEE, 2014.

K. Kojima, T. Suzuki, S. Kuroda, J. Nishio, and K. Arai, Epitaxial Growth of High-Quality 4HSiC Carbon-Face by Low-Pressure Hot-Wall Chemical Vapor Deposition, Japanese Journal of Applied Physics, vol. 42, no. 6B, IOP, pp. L637-L639, 2003. doi:10.1143/JJAP.42.L637.

Kodigala Subba Ramaiah, I. Bhat, T. P. Chow, J. K. Kim, E. F. Schubert, D. Johnstone, S. Akarca-Biyikli, Growth and characterization of SiC epitaxial layers on Si- and C-face SiC substrates by chemical-vapor deposition, J. Appl. Phys. 15 November 2005; 98 (10): 106108, .

K. Kojima, H. Okumura, S. Kuroda, K. Arai, Homoepitaxial growth of 4 H -SiC on on-axis (0001) C-face substrates by chemical vapor deposition, Journal of Crystal Growth, vol. 269, issues 2-4, 2004, pp. 367-376, .

S. Nishizawa, K. Kojima, S. Kuroda, K. Arai, M. Pons, Modeling of SiC-CVD on Si-face/Cface in a horizontal hot-wall reactor, Journal of Crystal Growth, vol. 275, 2005, pp. e515-e520, .

K. Kojima, S. Kuroda, H. Okumura, K. Arai, Homoepitaxial Growth on a 4H-SiC C-Face Substrate, Chem. Vap. Deposition, 2006, 12: 489-494. .

J. Hassan, J.P. Bergman, A. Henry, E. Janzén, On-axis homoepitaxial growth on Si-face 4HSiC substrates, Journal of Crystal Growth, vol. 310, issue 20, 2008, pp. 4424-4429, .

W. Chen, K. Lee, M. A. Capano, Growth and characterization of nitrogen-doped C-face 4HSiC epilayers, Journal of Crystal Growth, vol. 297, issue 2, 2006, pp. 265-271, .

Z. Zhao, Y. Li, X. Xia, Y. Wang, P. Zhou, Z. Li, Growth of high-quality 4H-SiC epitaxial layers on off-axis C-face 4H-SiC substrates, Journal of Crystal Growth, vol. 531, 2020, .

This ePub file was created using machine-generated methods and automated software to convert the source text into an ePub format and may contain formatting inconsistencies from the original version. Formatting may vary depending on the device used.

The original version of this eBook is available on https://www.scientific.net/book/bulk-and-epitaxial-growth-of-sic/978-3-0364-3124-6

Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 21-25

doi: 10.4028/p-kXxK8f

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-09-11

Revised:
2025-12-17

Accepted:
2026-02-23

Online:
2026-05-18

Development of High Concentration Uniformity Epitaxial Growth on 200 mm 4H−SiC Wafers 

The original version of this paper is available on https://www.scientific.net/SSP.393.21.pdf

Weining Qian 1,2,a*, Feihong Huang 2, b, Jinan Li2,c, Gan Feng 2, d, Jianhui Zhao 1,2,e and Junyong Kang 1,f

¹College of Physical Science and Technology, Xiamen University, Xiamen, 361005, Fujian, China

2 Epiworld International Co., LTD, Xiamen 361101,Fujian, China

a* qianwn@epiworld.com.cn, b  huangfh@epiworld.com.cn, clija@epiworld.com.cn, dfengg  @epiworld.com.cn, e  zhaojh@epiworld.com.cn, f  jykang @ xmu.edu.cn

Abstract

This study focuses on addressing the challenge of poor doping concentration uniformity during the epitaxial growth of 200 mm4H−SiC substrates, which is primarily caused by difficulties in thermal field and flow field control. By systematically optimizing key process parameters, including H2 flow rate, C/Si ratio, and growth temperature, a high uniformity concentration technology was developed. This technology has enabled a breakthrough in the performance of n-type epitaxial layers, with the doping concentration uniformity significantly improved to 0.67%. Based on the validation of this technology-encompassing 8,000 epitaxial wafers and thick epitaxial layers ( ≥30μm )-the technology demonstrates excellent doping concentration uniformity. This research provides a reliable technical foundation for the large-scale application of large-size SiC materials in power devices.

Keywords: 200 mm4H−SiC, hot-wall reactor, high concentration uniformity.

Introduction

The original version of this paper is available on https://www.scientific.net/SSP.393.21.pdf

Silicon carbide (SiC), with its exceptional electrical properties such as wide energy band gap, high breakdown electric field strength, and high thermal conductivity, exhibits revolutionary advantages over silicon ( Si ) in numerous applications [1]. As is well known, larger-diameter SiC wafers enable higher device counts per wafer with driving down per-unit device costs [2]. Therefore, in order to reduce the device cost and improve device performance, SiC wafer diameters have progressively evolved from 100 mm ( 4 inch) to 150 mm ( 6 inch), and are now advancing toward 200 mm ( 8 inch) technology [3].

The performance of power devices depends to a large extent on the quality of 4H−SiC epitaxial wafers [4], so the homoepitaxial growth of 4H−SiC is critical for the fabrication of 4H−SiC power devices. As the diameter of the 200 mm substrates increases, the difficulty of controlling multiple physical fields significantly multiplies in epitaxial growth process, especially with respect to the thermal field and flow field. The radial temperature gradient increases and the gas flow dynamics within the reaction chamber become more complex, which makes the problem of uneven nitrogen doping even more apparent [5]. Therefore, achieving high doping concentration uniformity ( σ/ mean ) of epitaxial layers on 200 mm substrates is critical factor for minimizing device performance variation across large-diameter substrates.

In this work, a significant improvement in concentration uniformity are achieved by optimizing the epitaxial process parameters and introducing ammonia as n-type doping Source. And the latest results of 200 mm4H−SiC epitaxial wafers are shown.

Experimental

The original version of this paper is available on https://www.scientific.net/SSP.393.21.pdf

A horizontal hot-wall reactor was employed for epitaxial growth. The silicon precursor is trichlorosilane (TCS), while Ethylene ( C2H4 ) serves as the carbon precursor. Hydrogen ( H2 ) acts as both the dilution and carrier gas, and ammonia (NH3) provided n -type doping. Featuring an automatic loading/unloading system operating at 900∘C, the reactor enabled high growth rates. Substrates are
commercial domestic-made n-type 200 mm 4H-SiC substrates with a 4∘ off-cut toward the [11-20] direction.

Thickness and doping concentration of 4H−SiC epitaxial layer are evaluated by Fourier-Transform Infrared spectroscopy (FTIR) and Mercury Capacitance-Voltage (MCV) with 5 mm edge exclusion. Because the thickness and doping concentration show concentric distribution, these measurements are performed along the radial direction. Surface defect are evaluated with SICA88 with 3 mm edge exclusion.

Results and Discussion

The original version of this paper is available on https://www.scientific.net/SSP.393.21.pdf

There is a significant challenge in achieving high concentration uniformity for epitaxial layers on 200 mm substrates. When scaling the substrate size from 150 mm to 200 mm , thermal field inhomogeneities and gas flow distribution inhomogeneities increase significantly. Meanwhile, the enlargement of the epitaxial chamber leads to elevated background concentration and reduced concentration stability.

Based on our previous research findings and epitaxial growth experience, these parameters (growth temperature, main H2 flow rate, C/Si ratio) exert a significant influence on the epitaxial doping concentration. Increasing the main H2 flow rate and optimizing the H2 flow distribution between the central and side channels can suppress flow disturbances and improve the uniformity of flow field distribution [6]; Elevating the growth temperature can reduce temperature differences across different regions of the wafer surface and enhance the uniformity of thermal field distribution on the wafer surface [7]; According to the C/N site-competition theory [8], a slightly C-rich growth environment can suppress concentration fluctuations [9]. Following the optimization of the abovementioned parameters, we finalized a comprehensive processing protocol. The detailed process parameters are provided in Table 1. This optimized process named as a high concentration uniformity (HCU) epitaxial growth technology for 200 mm4H−SiC wafers.

As a result of the above process optimizations, the doping concentration uniformity ( σ/ mean ) of the 10μ m epitaxial layer has been improved from an initial 3.56% to an exceptional 0.67%, as illustrated in Fig. 1(a). Meanwhile, an extremely high thickness uniformity ( σ/ mean ) lower than 0.81% and low surface defect count fewer than 3 pieces (pcs) have been achieved on the epitaxial layer, as shown in Fig. 1(b) and (c). The stability verification of the HCU technology was evaluated with 25 consecutive runs (one PM (preventive maintenance) cycle). As shown in Fig. 1(d), the doping concentration uniformity of epitaxial layers were consistently maintained below 1.5% with an average value of 0.88%. The data confirmed the robustness of the HCU technology in maintaining superior uniformity control throughout one PM cycle.

Using the HCU technology, over 8,000200 mm epitaxial wafers have been produced. The statistical analysis of these epitaxial wafers is shown in Figs. 2(a) to (c). In Fig. 2(a), the mean doping concentration uniformity of the epitaxial wafers is approximately 1.59%, with over 75% of the wafers exhibiting concentration uniformity below 2%. Fig. 2(b) reveals that the mean thickness uniformity is approximately 1.39%, with over 75% of the epitaxial wafers demonstrating thickness uniformity below 1.57%. What is more, Fig. 2(c) shows that the mean total usable area (TUA) is approximately 97.6%, with over 75% of the epitaxial wafers achieving a TUA exceeding 97.1%. The TUA is calculated by ideally dividing the wafer surface in 5×5 mm2 and counting the percentage of squares not containing any defect (defects considered include downfalls, triangles, carrots, and micropipes). During mass production, slight quality fluctuations of the epitaxial wafers are unavoidable due to factors such as variations in PM operations, equipment differences, and personnel operation inconsistencies in the production process. Thus, the mass production data are slightly inferior to the experimental data. These mass production data demonstrate industry-leading repeatability in our 200 mm4H−SiC epitaxial growth process.

It is well-known that the higher the voltage rating of power device, the lower the doping concentration of the epitaxial layer, and the greater the difficulty in controlling the uniformity of the doping concentration. To further evaluate the HCU technology, 3300 V epitaxial wafers have also been grown using this technology with a doping concentration of 3E15 cm−3 and thickness of 30μ m.

As shown in Fig. 3(a) the doping concentration uniformity of epitaxial layers were consistently maintained below 1.7%. Fig. 3(b) shows the thickness uniformity were consistently maintained below 1.3%, Fig. 3(c) shows TUA ( 5 mm×5 mm ) were consistently maintained exceeding 98.56%. These results confirm that the HCU epitaxial growth technology is applicable to a wide range of doping concentrations.

Table 1. Specific process parameters of HCU growth technology for 200 mm4H−SiC wafer.

Growth

Temperature

Pressure

mathematical formula mbar mathematical formula

Main superscript number flow

rate mathematical formula

C/Si ratio

superscript number | 100 | superscript number | mathematical formula

[picture]

Fig. 1. (a) The radial doping concentration distribution before and after optimization. (b) The radial thickness distribution after optimization. (c) The map of triangle and downfall defects after optimization. (d) The doping concentration uniformity statistics of continuous 25 runs epitaxial wafers.

Fig. 1. (a) The radial doping concentration distribution before and after optimization. (b) The radial thickness distribution after optimization. (c) The map of triangle and downfall defects after optimization. (d) The doping concentration uniformity statistics of continuous 25 runs epitaxial wafers.

[picture]

Fig. 2. The statistical results of : (a) doping concentration uniformity, (b) thickness uniformity and (c) TUA ( 5 mm×5 mm ), based on over 8,000 epitaxial wafers.

Fig. 2. The statistical results of : (a) doping concentration uniformity, (b) thickness uniformity and (c) TUA ( 5 m m × 5 m m ), based on over 8,000 epitaxial wafers.

[picture]

Fig. 3. Results for 30μ m-thick 4H−SiC epitaxial growth: (a) average concentration and uniformity per run; (b) average thickness and uniformity per run; (c) killer defect density (KDD) and TUA ( 5 mm×5 mm ). All measurements were based on HCU technology.

Fig. 3. Results for 30 μ m-thick 4 H − S i C epitaxial growth: (a) average concentration and uniformity per run; (b) average thickness and uniformity per run; (c) killer defect density (KDD) and TUA ( 5 m m × 5 m m ). All measurements were based on HCU technology.

Summary

The original version of this paper is available on https://www.scientific.net/SSP.393.21.pdf

This study successfully resolved the thermal/flow field co-control challenges in the epitaxial growth of 200 mm 4 H -SiC substrates. Through optimization of process parameters, it significantly improved the doping concentration uniformity to 0.67%, while achieving a thickness uniformity of 0.81% and an ultra-low defect density. Mass production validation ( >8,000 wafers) confirmed process stability, with 75% of wafers meeting stringent specifications of doping uniformity <2% and TUA >97.1%. The developed HCU technology further overcame process window limitations for high-voltage thick epitaxial layers ( 30μ m,3E15 cm−3 ) under low doping conditions. It achieved the simultaneous optimization of inter-wafer/intra-wafer doping and thickness uniformity along with fatal defect density <0.1 cm−2 and TUA >98.56%, laying the foundation for mass production of highvoltage SiC devices. This technological breakthrough comprehensively advances the industrialization of 200 mm SiC epitaxial processes and provides core material support for next-generation power semiconductor applications.

References

The original version of this paper is available on https://www.scientific.net/SSP.393.21.pdf

J. B. Casady, R. W. Johnson, Status of silicon carbide (SiC) as a wide-bandgap semiconductor for high-temperature applications A review, Solid-State Electron., 39 (1996) 1409-1422.

M. Musolino, E. Carria, D. Crippa, et al, Development of n-type epitaxial growth on 200 mm 4H-SiC wafers for the next generation of power devices, Microelectron. Eng., 274 (2023) 111976.

M. Musolino, E. Carria, D. Crippa, et al, Paving the way toward the world's first 200 mm SiC pilot line, Mat. Sci. Semicon. Proc., 2021, 135 (2021) 106088.

J. Li, C. Meng, L. Yu, et al, Effect of various defects on 4H-SiC Schottky diode performance and its relation to epitaxial growth conditions, Micromachines-basel, 11 (2020) 609.

G. Hu, G. Zhong, X. Xiong, et al, Improvement of the resistivity uniformity of 8-inch 4H-SiC wafers by optimizing the thermal field, Vacuum, 222 (2024) 112961.

J. Zhang, J. Mazzola, C. Hoff, et al, High growth rate (up to ) SiC epitaxy in a horizontal hot-wall reactor, Mater. Sci. Forum, 77 (2005) 483-485.

X. Gong, P. Li, T. Xie,et al, High uniform N-type doping of homoepitaxy based on a horizontal hot-wall reactor, J. Cryst. Growth, 648 (2024) 127877.

D.J. Larkin, P.G. Neudeck, J.A. Powell, L.G. Matus, Appl. Phys. Lett., 65 (1994) 1659-1661.

G. Ferro, D. Chaussende, Revisiting the site-competition doping of : cases of N and Al , Mater. Sci. Forum, 1004 (2020) 96-101.

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Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 27-33

doi: 10.4028/p-1jrfAp

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-09-11

Revised:
2025-12-10

Accepted:
2026-01-31

Online:
2026-05-18

Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

Michael Schley 1,a, Friedrich Schaaff 1, b and Jan Richter 2,c*

1 Silicon Products Bitterfeld GmbH, Alustrasse 5, 06749 Bitterfeld, Germany

2 Zadient Technologies SAS, Chambery, France

a  Michael.Schley@silicon-products-gmbh.com, b  Friedrich.Schaaff@silicon-products-gmbh.com,

c*Jan.richter@zadient.com

Keywords: silicon carbide (SiC), ultra-high purity, chemical vapor deposition (CVD), physical vapor transport (PVT) growth, polycrystalline 3C-SiC, trace impurities, glow discharge mass spectrometry (GDMS), secondary ion mass spectrometry (SIMS), neutron activation analysis (NAA), optical applications, transparent wafers, augmented reality (AR).

Abstract

We report on the development and systematic validation of an ultra-pure silicon carbide (SiC) source material specifically engineered for physical vapor transport (PVT) growth of opticaland electronic-grade single crystals. The material is synthesized by chemical vapor deposition (CVD) using high-purity chlorosilane and methane precursors, yielding dense, void-free polycrystalline 3CSiC with precise 1:1 stoichiometry. Over more than two years of continuous production, bulk metallic impurities across 17 monitored elements were consistently maintained below 100 parts per billion by weight (ppbw), with most batches achieving <50ppbw. Surface metals, assessed after proprietary crushing and cleaning processes, were similarly controlled to <100ppbw. Nitrogen levels, determined by secondary ion mass spectrometry (SIMS), remained stable in the low 1015 cm−3 range, enabling semi-insulating or precisely doped crystal growth. Purity and reproducibility were verified by a crosstechnique analytical approach including glow discharge mass spectrometry (GDMS), and inductively coupled plasma mass spectrometry (ICP-MS). Microstructural investigations confirmed dense, voidfree grains and high crystallographic uniformity. With production capacity scaling toward 60 tons per month, this CVD-based SiC source material establishes a robust platform for next-generation PVT growth. Its combination of ultra-low contamination, structural integrity, and scalable manufacturing positions it as a key enabler for optical SiC applications such as transparent wafers for augmented reality (AR) systems, as well as advanced power and RF devices.

Introduction

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

Silicon carbide (SiC) has become one of the most critical semiconductor materials for advanced applications in power electronics, radio frequency (RF) devices, and optical systems 1−3. Its wide bandgap, high thermal conductivity, and mechanical robustness make it the preferred substrate for high-performance devices that must operate under extreme thermal and electrical conditions. Beyond traditional electronic applications, recent interest in transparent and semi-insulating SiC has opened new opportunities in optoelectronics and augmented reality (AR) systems, where crystal transparency and ultra-low contamination are essential requirements 4,5.

A fundamental prerequisite for high-quality SiC crystal growth is the availability of ultra-pure feedstock material 6−8. Physical vapor transport (PVT) growth, the dominant industrial method for producing single-crystalline 4 H - and 3C-SiC, is highly sensitive to the purity and stoichiometry of the source. Even trace amounts of metallic impurities, uncontrolled nitrogen incorporation, or residual free silicon and carbon can destabilize sublimation chemistry, increase defect density, and compromise device performance. Consequently, developing reliable and scalable SiC source materials with exceptionally low impurity levels has become a critical challenge for the industry.

Conventional polycrystalline SiC powders, often produced via carbothermal reduction, suffer from limitations in chemical purity, batch-to-batch reproducibility, and structural homogeneity. Alternative approaches, such as advanced chemical vapor deposition (CVD), have emerged as promising routes to engineer feedstock with controlled stoichiometry, dense microstructure, and minimal defect density. CVD-based processes further offer the potential for scalability and independence of supply-
factors that are increasingly relevant as demand for SiC substrates accelerates across multiple industries.

In this work, we present the development and validation of a new CVD-derived SiC source material tailored for PVT growth of high-quality crystals. Using ultra-high-purity chlorosilane and methane precursors, we deposit dense, void-free polycrystalline 3C-SiC with precise atomic stoichiometry. Over a multi-year production period, we demonstrate outstanding reproducibility and impurity control, with bulk metallic concentrations consistently below 100 parts per billion by weight (ppbw) and nitrogen incorporation stabilized in the low 1015 cm−3 range. A multi-technique analytical strategy-including glow discharge mass spectrometry (GDMS), secondary ion mass spectrometry (SIMS), and inductively coupled plasma mass spectrometry (ICP-MS)-was employed to establish the reliability of impurity quantification and to validate surface cleaning processes.

The results confirm that this material platform provides one of the purest and most structurally uniform polycrystalline SiC feedstocks available today. Its reproducibility, combined with ongoing capacity expansion toward industrial-scale volumes, positions it as a robust and cost-effective enabler for next-generation optical SiC applications, as well as for advanced power and RF devices.

Materials and Methods

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

The production of the ultra-pure SiC source material was carried out in a former CVD silicon facility located within the chemical infrastructure of Chemiepark Bitterfeld, Germany. The complete process flow, comprising CVD synthesis, comminution, surface treatment, and packaging, is illustrated in Figure 1.

[picture]

Fig. 1. Process steps for the production of ultra-pur SiC source material.

Fig. 1. Process steps for the production of ultra-pur SiC source material.

CVD Synthesis

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

The SiC source material was produced by chemical vapor deposition (CVD) using ultra-high purity chlorosilane and methane as precursors. The process yields dense, void-free polycrystalline 3C-SiC layers with precise 1:1 Si to C stoichiometry, free of elemental silicon or carbon inclusions. The deposition was carried out under tightly controlled conditions in a dedicated CVD facility in Germany, ensuring reproducibility and scalability across extended production campaigns 6−8.

Comminution

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Following deposition, the bulk polycrystalline SiC blocks were subjected to a comminution step. Mechanical crushing and milling were optimized to preserve microstructural integrity while achieving controlled particle size distributions. Tailored particle sizes ranging from 0.5 to 15 mm were produced, with bulk densities up to 1.9 g/cm3. This flexibility allows the feedstock to be adapted to diverse PVT loading strategies and crystal growth systems.

Surface Treatment

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To remove any residual surface contamination introduced during comminution, a proprietary surface treatment protocol was applied. This included multi-stage acid leaching designed to dissolve trace metallic residues without altering the SiC bulk. Surface analysis confirmed that metallic contamination after treatment remained consistently below 100 ppbw .

Packaging

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

Finally, the purified SiC granules were packaged in contamination-controlled environments to ensure preservation of purity during storage and shipping. The packaging design minimizes environmental exposure and enables reliable long-distance transport for both industrial and research use.

Analytics and Characterization

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

To rigorously validate the purity and structural quality of the SiC source material, a multitechnique analytical strategy was implemented. This cross-validation approach ensured high confidence in both bulk and surface measurements and minimized the risk of systematic error from any single method.

Bulk Impurity Analysis

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

Used to quantify metallic impurities within the bulk polycrystalline SiC Glow Discharge Mass Spectrometry (GDMS) offered high sensitivity, with detection limits in the low parts-per-billion by weight (ppbw) range 9. Here we were able to optimize the characterization process and sample preparation to achieve detection limits in the single digit ppbw (parts per billion weight) region. Across more than two years of production, all 17 monitored elements were consistently maintained below 100 ppbw , with most batches showing <50ppbw (see figure 2).

[picture]

Fig. 2. Bulk concentration for selected elements of concern in ppbw (parts per billion weight) shown in boxplots over the last 12 months.

Fig. 2. Bulk concentration for selected elements of concern in ppbw (parts per billion weight) shown in boxplots over the last 12 months.

Nitrogen Incorporation

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

High-sensitivity Secondary Ion Mass Spectrometry (SIMS) was used to quantify nitrogen concentrations 10, which remained in the low 1015 cm−3 range. In figure 3 a production chart is given to show the consistency of the incorporation level over time (please note that 30 ppba correspond to 2.9*1015 atoms /cm3 ). This enables both semi-insulating material growth and controlled doping strategies for device applications.

[picture]

Fig. 3. Nitrogen concentration in ppba (parts per billion atoms) < 30 ppba corresponding to 2.9*1015 atoms /cm3.

Fig. 3. Nitrogen concentration in ppba (parts per billion atoms) < 30 ppba corresponding to 2.9 * 10 15 atoms / c m 3 .

Surface Purity Determination

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

We applied inductively coupled plasma mass spectrometry (ICP-MS) to quantify residual surface contamination following the proprietary cleaning process 11−13. Prior to analysis, hot acid leaching was employed to dissolve trace residues from the SiC surface. The completeness of this procedure was verified through successive leaching steps, which showed no detectable contamination (i.e., below the instrument detection limit), confirming the effectiveness of the initial treatment. Across all batches, the combined concentration of surface metals remained consistently below 100 ppbw (see Figure 4). Through a combination of optimized sample preparation and refined analytical methodology, absolute detection limits below 1 ppbw were achieved for all elements of concern.

[picture]

Fig. 4. Surface concentration for selected elements of concern in ppbw (parts per billion weight) shown in boxplots over the last 12 months.

Fig. 4. Surface concentration for selected elements of concern in ppbw (parts per billion weight) shown in boxplots over the last 12 months.

Structural and Stoichiometric Analysis

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

The High-Resolution Scanning Electron Microscopy (HRSEM) revealed dense, void-free microstructures with average grain sizes of ~50μ m (see figure 5). The analysis was provided by the Fraunhofer IKTS in Dresden, Germany.

[picture]

Fig. 5. High resolution TEM image of the polycrystalline SiC structure.

Fig. 5. High resolution TEM image of the polycrystalline SiC structure.

The crystalline structure of the material was analyzed by X-ray diffraction (XRD). The resulting diffraction pattern confirmed the presence of a single polycrystalline 3C-SiC phase, with no detectable secondary phases. The slight broadening of the dominant diffraction peak at 35.4∘ is attributed to the limited grain size and the associated grain boundary effects. Notably, the typical side peaks characteristic of 4 H - and 6H−SiC polytypes-appearing around 38∘ and below 35∘-were completely absent. Furthermore, the peak observed at 41.3∘ is uniquely consistent with the 3 C polytype and does not occur in 4 H or 6 H samples, reinforcing the phase purity of the deposited material 14−17.

[picture]

Fig. 6. XRD scan confirming the 3 C structure of the polycrystalline SiC .

Fig. 6. XRD scan confirming the 3 C structure of the polycrystalline SiC .

The precise 1:1 Si:C atomic ratio was confirmed by the exclusion of excess silicon and carbon within the material. Excess silicon was investigated using XRD on finely powdered samples, which would reveal any residual elemental silicon on the surface. However, it should be noted that the detection limit of this method remains relatively high, in the range of 100−500ppmw, leaving room
for further sensitivity improvements. Excess carbon was assessed by combustion analysis, which did not indicate any detectable carbon inclusions above the method's detection threshold. Similar to silicon, the current detection limit for free carbon lies in the ~500ppmw range, highlighting the need for enhanced analytical resolution in future studies.

Summary

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

This work demonstrates that chemical vapor deposition (CVD) is the most effective route to produce ultra-pure silicon carbide (SiC) source material for physical vapor transport (PVT) growth. Unlike conventional synthesis methods, CVD enables precise control over stoichiometry, microstructure, and impurity levels, resulting in dense, void-free 3C-SiC with reproducible properties across multiple production batches.
Extensive characterization is essential to optimize the production process and to ensure reproducibility. A multi-technique analytical framework, combining GDMS, SIMS, ICP-MS, SEM, and XRD, provides the resolution and confidence required to confirm trace-level purity and structural integrity. This systematic validation not only guarantees the material's suitability for advanced optical and electronic applications but also builds a robust foundation for further process optimization.
Finally, CVD offers a straightforward and scalable path to mass production. With demonstrated longterm reproducibility and ongoing capacity expansion, the technology is positioned to support industrial-scale volumes while maintaining the highest levels of purity. This makes CVD-derived SiC source material a reliable and future-proof enabler for next-generation applications ranging from augmented reality optics to high-performance power and RF devices.

Acknowledgement

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

This work was supported by the project FastLane. The project is supported by the Chips Joint Undertaking (JU) and its members, including top-up funding by Austria, France, Germany, Romania, and Slovakia, under grant agreement No 101139788.

FAST|ANE
hipsJU

Co-funded by the European Union

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

References

The original version of this paper is available on https://www.scientific.net/SSP.393.27.pdf

Kimoto, T., & Cooper, J. A. (2014). Fundamentals of Silicon Carbide Technology: Growth, Characterization, Devices and Applications. Wiley-IEEE Press.

Choyke, W. J., Matsunami, H., & Pensl, G. (Eds.). (2004). Silicon Carbide: Recent Major Advances. Springer.

Kordina, O., Saddow, S. E., Kimoto, T., & Agarwal, A. (2021). Silicon Carbide Power Devices. Elsevier.

Rupp, R., et al. (2018). "Ultra-high-purity SiC and its role in power electronics." Journal of Crystal Growth, 498, 380-387.

Murakami, H., et al. (2020). "Advances in bulk SiC crystal growth for optical and power applications." Applied Physics Express, 13(12), 120101.

Größmann, I., et al. (2021). "Method and device for producing a SiC solid material." International patent application WO 2022123072.

Ceran, K., et al. (2022). "Method for producing at least one crack-free SiC piece." International patent application WO 2023222787.

Größmann, I., et al. (2024). "Method and system for SIC production and improved vent gas recycling." International patent application WO2025051945.

Hofmann, S., & Rauschenbach, B. (1990). "Glow discharge mass spectrometry in materials science." Surface and Interface Analysis, 16(9), 577-582.

Itoh, A., Okumura, H., & Matsunami, H. (1995). "Quantitative analysis of nitrogen in 4H-SiC epilayers by secondary ion mass spectrometry." Journal of Applied Physics, 77(11), 837-843.

Rossotti, F. J., et al. (2023). "Tackling the Challenging Determination of Trace Elements in Ultrapure SiC via LA-ICP-MS." Molecules, 28(6), 2845.

Fraunhofer Center for Silicon Photovoltaics CSP. (n.d.). "Surface contamination analysis, highsensitivity ICP-MS of SiC materials." Fraunhofer CSP Ultratrace Analysis Service. .

Toray Research Center, Inc. (2016). "High-sensitive analysis of metal impurities on Si & SiC substrates-ICP-MS methods." Toray Technical Information Series.

Ruska, J., Lugovy, M., & Kordina, O. (2001). "Accuracy of X-ray diffraction SiC polytypecomposition analyses." Journal of Materials Synthesis and Processing, 9(4), 211-218.

Gauckler, L. J., & Scherrer, P. (2003). "Quantitative polytype-composition analyses of SiC using X-ray diffraction." Journal of Materials Processing Technology, 136(1-3), 191-197.

Wyatt, C. N., & Blackson, J. (2016). "Using XRD and TGA-DSC to characterize a silicon carbide powder." Kansas State University Undergraduate Research Reports, 12, 1-7.

Kumar, G., Chen, J.-W., Ma, H.-H., Huang, X.-F., & Huang, M. H. (2022). Facet-dependent electrical conductivity properties of a wafer. Journal of Materials Chemistry C, 10(28), 10424-10428.

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Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 35-39

doi: 10.4028/p-g7vlrZ

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-09-11

Revised:
2026-01-06

Accepted:
2026-02-23

Online:
2026-05-18

Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

The original version of this paper is available on https://www.scientific.net/SSP.393.35.pdf

Tawhid Rana 1,a, Taskin Karim 1, b, Jonas P. Murphy 1,c, Sam Johnson 1, d, Nicolas Thierry-Jebali 1,e and Edward Sanchez 1,f

1 SK siltron css, 1311 Straits Drive, Bay City, MI 48706, USA

a tawhid.rana@sksiltron.com, b taskin.karim@sksiltron.com, c jonas.murphy@sksiltron.com, d sam.johnson@sksiltron.com, e nicolas.thierry@sksiltron.com, f edward.sanchez@sksiltron.com

Keywords: silicon carbide epitaxy, thick epitaxy, edge exclusion, ultra thick epitaxy, polishing of epilayers, pits, bumps, BPD pileup, BPD crowding.

Abstract

Thick epitaxy with different buffer and drift layer growth rates are studied. Epilayer with higher growth rates demonstrates lower basal plane dislocaiton (BPD) but higher stacking faults. We use the optimum growth rate found from the aforesaid experiments to achieve 100 um and 200 um epilayers. BPD pileup was observed, especifally at the edges of the epilayer rendering an exclusion area upto 15 mm from the edge. Hence, we argue that it is essential to consider higher exclusion region for thicker epilayers. Large, pits and bumps are observed for thicker epitaxy, upto a diameter of 48μ m for 200μ m epilayers. Finally, we polish the epilayers and demonstrated 98% and 95% total usable area (TUA) for 100μ m and 200μ m epitalayers respectively.

Introduction

The original version of this paper is available on https://www.scientific.net/SSP.393.35.pdf

Silicon carbide is an important material for high voltage applications due to its various exceptional electrical and mechanical properties [1]. Currently SiC crystal is widely used in electric vehicle (EV) related electronic applications. Typically, operational voltages of these power devices are in the range of 0.6−1.5kV, where typically 6μ m−15μ m epitaxial layers are used. However, to block high voltage ( >5kV ), much thicker epitaxy ( >50μ m ) is required. Thick SiC epitaxy is extremely challenging due to severe surface degradation by formation of larger morphological and extended defects, as well as various complex dislocations (half loop array or HLA, BPD pileup, etc.). Thick epitaxy in the range of 50−100μ m is demonstrated in earlier literature [2]. In this research, we study epitaxy in the range of 60−200μ m on 150 mm4H−SiC wafers for surface, defectivity, wafer shape, etc.

Experimental

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A commercial, single wafer epi reactor is used to grow epilayers with various thicknesses. We compare the results with various growth rates. We increase growth rates for buffer and drift layers ( 3 times ( 3 x ) and 2 times ( 2 x ) respectively) by increasing precursor gases. We adjust growth time to achieve the target thicknesses (60μ m,100μ m and 200μ m), whereas adjust nitrogen flow rate to achieve a doping target of ~1e15 cm−3. We select wafers from adjacent slices in a boule to minimize the wafer-to-wafer variations. Wafer shapes are measured using Tropel Ultrasort and defects are characterized by a SiCA88 tool. Chemo-mechanical polishing (CMP) was performed on these epilayers with a removal of ~1μ m to improve roughness of the surface, associated with the thick epitaxy.

Results

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Higher growth rate is needed for thicker epitaxies to minimize the growth time. To study the effect of higher growth rates on defects, first, we increase growth rate by increasing precursor gas flow rates.

We find that higher growth rates reduce basal plane dislocations (BPD) in the epilayer, however increases stacking faults (SF) (Fig. 1). We further optimize the process for the higher growth rates to reduce SF by optimizing process conditions.

[picture]

Fig. 1. Optimization of the buffer and drift layer growth rates (GR) are performed. a) BPD is reduced with higher growth rate and b) stacking faults are increased with higher growth rates.

Fig. 1. Optimization of the buffer and drift layer growth rates (GR) are performed. a) BPD is reduced with higher growth rate and b) stacking faults are increased with higher growth rates.

We study surface defects on the epitaxy grown at different thicknesses using Sica88. We find that surface degrades with increased roughness with thicker epitaxies, visible from the surface images with pits and bumps. Threading screw/edge dislocations (TSD/TED) in the substrates can introduce pits in the epilayers [3]. These pits grow significantly larger for the thicker epitaxies (60μ m,100μ m, 200μ m ). We observe that for thicker epitaxies, these pits also create bump and wave-like features from the pit center, towards 112―0 direction (Fig.2).

[picture]

Fig. 2. Examples of pits in the epi at different thicknesses. a) smaller ( 21μ m ) size epi pits are seen for ~60μ m epilayer, with waviness on the right side of the pit towards 112―0 direction. These pits and the consequent wave shapes becomes larger for thicker epitaxy ( b and c ).

Fig. 2. Examples of pits in the epi at different thicknesses. a) smaller ( 21 μ m ) size epi pits are seen for ~ 60 μ m epilayer, with waviness on the right side of the pit towards 11 2 ― 0 direction. These pits and the consequent wave shapes becomes larger for thicker epitaxy ( b and c ).

On the other hand, intricate shapes of basal plane dislocations (BPD) as pileups are seen in the PL images as described in [4]. We find that these BPD pileups are mainly seen at the edge of the wafers (Fig. 3), or around any obstructions on the step flow (e.g. particle, triangular defects etc.).

[picture]

Fig. 3. PL images are shown for the epilayers grown with different thicknesses. Intricate lines of PL BPDs are seen for the thicker epi (100μ m,200μ m). The width of the impact increases for thicker epi, extending upto 15μ m from the edge. Shaded region shown as typical edge exclusion ( 3μ m ).

Fig. 3. PL images are shown for the epilayers grown with different thicknesses. Intricate lines of PL BPDs are seen for the thicker epi ( 100 μ m , 200 μ m ) . The width of the impact increases for thicker epi, extending upto 15 μ m from the edge. Shaded region shown as typical edge exclusion ( 3 μ m ).

Initially, we study on the effect of polishing for 60μ m epilayers to smooth out the pits and high step bunching associated with the thick epitaxy. We find that a surface removal of ~0.5um by polishing effectively removes pits on the surface for 60μ m epi (Fig. 4).

[picture]

Fig. 4. Surface images are shown for a ~60μ m epilayer. a) large pits and step bunching are seen for the epilayer b) These pits and step bunchings are removed by planarization technique (polishing).

Fig. 4. Surface images are shown for a ~ 60 μ m epilayer. a) large pits and step bunching are seen for the epilayer b) These pits and step bunchings are removed by planarization technique (polishing).

We conduct similar polishing study for the 100μ m and 200μ m epitaxy with a ~1μ m removal to have the similar effect to remove pits and bumps (Fig. 5).

[picture]

Fig. 5. a) Pits and b) bump reduction by polishing in 100μ m and 200μ m epilayer.

Fig. 5. a) Pits and b) bump reduction by polishing in 100 μ m and 200 μ m epilayer.

Larger sized pits and bumps in 200μ m epilayers render total usable area (TUA) poorly ( ~2% ). Hence, Si face polishing was essential to smooth out the surface. Si face polishing ( 1μ m removal) significantly reduces pits and bumps in the epilayer (Fig. 5). With polishing, we demonstrate TUA of 98% for 100μ m and 95% for the 200μ m epilayer, respectively. Even though polishing removes pits and bumps from the surfaces, it cannot remove particle-induced [5], larger morphological defects, like carrot, triangles etc., especially which originate closer to substrate-epilayer interfaces (Fig. 6).

Finally, we study the effect of polishing on the wafer shape. We find that wafer bows are reduced after polishing (Fig. 7). This is due to stress reduction by removal of Si and C faces.

[picture]

Fig. 6. a) Polishing steps increase total usable area (TUA) for thick epitaxy by eliminating pits and bumps in the epilayer (b, c).

Fig. 6. a) Polishing steps increase total usable area (TUA) for thick epitaxy by eliminating pits and bumps in the epilayer (b, c).

[picture]

Fig. 7. a) Shape transformation is shown for substrate to epilayer after the polishing of 200μ m epilayer b) Polishing reduces the bow for both 100μ m and 200μ m epitaxy.

Fig. 7. a) Shape transformation is shown for substrate to epilayer after the polishing of 200 μ m epilayer b) Polishing reduces the bow for both 100 μ m and 200 μ m epitaxy.

Summary

The original version of this paper is available on https://www.scientific.net/SSP.393.35.pdf

Higher growth rate is found to be beneficial for BPD conversion but may have adverse effect on stacking fault generation. Pit and bump sizes increase with higher thickness and polishing is essential to smooth out the surface. BPD crowding or pileup at the edge increases for thicker epitaxy and may impact up-to 15 mm from the edge for 200μ m epitaxy. We demonstrate 95%−98% TUA after polishing for 100μ m and 200μ m epitaxy. Thick epitaxy is challenging due to higher morphological and extended defects, which critically impact TUA of the ultra-thick epitaxy. Further optimization is required to reduce particle related defects and improve surface quality (pit, bumps etc.) for ultra thick epitaxy.

References

The original version of this paper is available on https://www.scientific.net/SSP.393.35.pdf

P. G. Neudeck, The VLSI Handbook, CRC Press LLC, 2006.

Jie Zhang, G. Chung, Edward Sanchez, Mark J. Loboda, Materials Science ForumMaterials Science Forum Vols. 717-720 (2012).

G Chung, C Lee, A Soukhojak, T. Rana, Materials Science Forum 1089, 31-35 (2023).

Nadeemullah A. Mahadik, Robert E. Stahlbush and, Woongje Sung, J. Appl. Phys. 131, 225702 (2022).

Rana, Tawhid, Hai Zheng Song, M.V.S. Chandrashekhar, and Tangali S. Sudarshan. Materials Science Forum 717-720 (May 2012): 153-56.

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Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 41-46

doi: 10.4028/p-X6hfof

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-09-12

Revised:
2025-12-15

Accepted:
2026-02-23

Online:
2026-05-18

Solution Growth Technique of Silicon Carbide with In Situ Observation

The original version of this paper is available on https://www.scientific.net/SSP.393.41.pdf

Y. Abe 1,a*, A. Kawabe 1,b, J. Osada 1,c, K. Kurashige 1,d, H. Nakanishi 1,e, H. Ishibashi 1,f and T. Ujihara 2, g

1 OXIDE Power Crystal Corporation 1741-8 Maginohara, Mukawa, Hokuto, Yamanashi, 408-0302, Japan

2 Graduate School of Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya, Aichi, 464-8603, Japan

a*abe.yoshihisa@opt-oxide.com, b kawabe.akihisa@opt-oxide.com, c osada@opt-oxide.com, d  kurashige.kazuhisa@opt-oxide.com, èhideo.nakanishi@opt-oxide.com, fishibashi@opt-oxide.com, q  ujihara@nagoya-u.jp

Keywords: solution growth, In-situ observation, meniscus, Induction heating.

Abstract

In the solution growth method for silicon carbide ( SiC ) single-crystal fabrication, in-situ observations were performed inside the furnace to monitor the meniscus at the seed-solution interface. A meniscus formed at the contact between the seed crystal and the solution, and variations in the reflections on the solution surface enabled optical monitoring and control of this interface. The observed surface images were also dependent on the frequency of the induction heating. Computational fluid dynamics (CFD) simulations indicated that lowering the heating frequency causes an upward displacement of the solution surface at its central region, producing a locally elevated contact position between the seed crystal and the solution. These findings demonstrate that in-situ observation constitutes an effective approach for precise control of meniscus shape during solution growth of SiC single crystals.

Introduction

The original version of this paper is available on https://www.scientific.net/SSP.393.41.pdf

Silicon carbide ( SiC ) is expected to play an increasingly important role in power devices owing to its superior electrical and physical properties compared with silicon (Si). However, various crystal defects in SiC adversely affect device performance and reliability [1]; therefore, reduction of defect density is required. Solution growth is considered to suppress defect formation because it proceeds near thermodynamic equilibrium at the growth interface, and it has thus been applied to SiC crystal growth [2]. Furthermore, incorporation of aluminum (Al) into the solution enables relatively facile ptype heavy doping for SiC single crystals, making solution growth advantageous for producing Al heavy doped p-type SiC substrates required for high-voltage devices such as insulated gate bipolar transistors (IGBTs) [3].
In SiC solution growth, the meniscus formed at the solution-crystal interface significantly influences crystal shape and growth kinetics [4]. In the top-seeded solution growth (TSSG) method, a Si-based alloy solution is contained in a graphite crucible, and a SiC single crystal seed is brought into contact with the solution to grow the SiC single crystal. In this method carbon for SiC growth is supplied by dissolution of the graphite crucible; as the crucible wall dissolves into the solution, carbon is transported to the seed via the solution. Consequently, the inner wall of the graphite crucible is eroded during the growth period. Moreover, because the solution is held at approximately 2000∘C well above the melting point of Si and the other metal elements, an evaporation of the solution is inevitable. For the reasons mentioned above, the solution surface is expected to change continuously throughout the growth period. Because crystal growth proceeds simultaneously, understanding solution behavior is crucial to maintaining precise control of the meniscus over prolonged growth durations.
However, maintaining the solution at around 2000∘C requires enclosing the crucible within an insulating hot zone, which complicates direct observation of the crucible interior. Previously, X-ray transmission imaging inside the furnace was explored to determine the solution shape [5]; however, the required apparatus is too complex for practical manufacturing equipment. Accordingly, this study
investigated the feasibility of observing the solution state inside the crucible and conducted preliminary crystal growth experiments with in-situ observations.

Experimental Methods

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As shown in Figure 1, an observation port (30 mm×40 mm ) was provided at the top of the hot zone in the induction-heating furnace, and the interior of the hot zone was imaged in real time by a camera positioned outside the chamber. The camera was positioned at an angle of several degrees to the vertical axis of the chamber so that it could observe the area near the contact between the seed crystal and the solution. The camera was equipped with an ND filter to observe high-temperature environments around 2000∘C. A common Si−40%Cr alloy was used as the solution and contained in a graphite crucible. The solution was heated to 2000∘C using mid-frequency induction heating, after which it was brought into contact with the seed crystal. The furnace atmosphere was argon at atmospheric pressure. The crystal growth time was set to 20 hours.
A 4H−SiC seed crystal was bonded to a graphite holder. Contact between the seed crystal and the solution was performed manually while monitoring the in-situ images. Note that

[picture]

Fig. 1. Solution growth apparatus with an in-situ observation system.

Fig. 1. Solution growth apparatus with an in-situ observation system.

rotation of the seed crystal and crucible was not performed in order to prioritize the in-situ observation.
Computational fluid dynamics (CFD) simulations were also performed to elucidate the solution free-surface and the solution flow behaviors. Simulations were carried out using STAR-CCM+ (Siemens Digital Industries Software), and the volume-of-fluid (VOF) method was employed to simulate the free surface of the solution. Because induction heating was used, surface tension and Lorentz forces arising from the electromagnetic field were included in the calculation of the free-surface shape. Regarding the wetting angle between the solution and the graphite crucible wall, a value of 45∘ was used in the present simulation, corresponding to the wetting angle between Si melt and SiC [6]. This choice is based on the assumption that the crucible wall reacts rapidly, resulting in the formation of SiC on the crucible surface.

Results and Discussion

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As shown in Figure 2(a) and (b), the solution surface is presented for a relatively high induction heating frequency and after contact between the seed crystal and the solution, respectively. Owing to the high reflectivity of the Si−Cr alloy solution, the solution surface was clearly visible. In Figure 2(a) the surface remained nearly stationary; however, when the seed was brought into contact with the solution, the reflected image changed markedly (Figure 2(b)), with the observation port aperture mirrored on the solution surface. This change results from meniscus formation upon contact, which substantially alters the surface curvature. Moreover, the inverted appearance of the aperture in Figure 2(b) indicates a concave meniscus with relatively small curvature. As the seed crystal was continuously lowered, this meniscus eventually disappeared, and the solution climbed up onto the graphite holder. Therefore, by observing this meniscus, the contact condition between the seed crystal
and the solution can be precisely controlled. We consider that maintaining this contact condition throughout the entire crystal growth process is a critically important technique.

[picture]

Fig. 2. (a) Image of the solution surface (yellow-shaded region) before contacting the seed. (b) Image after contact; a reflected image of the observation port (dark shape within the yellow region) appears on the solution surface. A schematic diagram of the reflected image is shown in the upper right.

Fig. 2. (a) Image of the solution surface (yellow-shaded region) before contacting the seed. (b) Image after contact; a reflected image of the observation port (dark shape within the yellow region) appears on the solution surface. A schematic diagram of the reflected image is shown in the upper right.

[picture]

Fig. 3. Before (upper images) and after (lower images) touching between the seed and the solution. (a) In case of higher frequency, the solution surface is stationary.
(b) In case of lower frequency, the solution surface is vibrating.

Fig. 3. Before (upper images) and after (lower images) touching between the seed and the solution. (a) In case of higher frequency, the solution surface is stationary. (b) In case of lower frequency, the solution surface is vibrating.

Next, we investigated the effect of changing the induction heating frequency to one-third of the higher frequency; the results before and after the change of the induction heating frequency are summarized in Figure 3 (a) and (b), respectively. At the lower frequency the solution exhibited clearly oscillations and the observed image became highly vibrating. Nevertheless, contact between the seed and the solution could still be identified from small changes in the image. We confirmed that contact between the seed crystal and the solution can be observed regardless of the induction heating frequency. Lowering the frequency also caused the seed-solution contact to occur at a higher position. In the next paragraph, we will use CFD simulations to explain the vibration of the solution and that difference in contact position.
According to the CFD simulations, in our case, the dominant factor in solution flow was the Lorentz force due to the induction heating. At lower frequency in the induction heating, the velocity of this flow was several times greater than at higher frequency. Therefore, we believe that the magnitude of the solution agitation caused the vibration. Simulation results prior to the contact are shown in Figure 4(a) and those after the contact in Figure 4(b). The vertical axis in Figure 4 denotes relative displacement (initial solution surface set to zero), and the horizontal axis denotes distance from the

[picture]

Fig. 4. Simulation results of solution surface profiles. (a) Before and (b) after the solution contacts the seed.

Fig. 4. Simulation results of solution surface profiles. (a) Before and (b) after the solution contacts the seed.

crucible center. Solution surface profiles at the two frequencies are plotted as black (higher frequency) and red (lower frequency) curves. In Figure 4(a), the lower frequency profile exhibits a central upward rise, indicating a higher contact position of the seed-solution than that of the higher frequency one. Lorentz forces at lower frequency act more uniformly on the solution, raising its central region. This behavior is attributed to increased electromagnetic skin depth at lower frequency, which reduces power dissipation in the crucible and allows the electromagnetic field to be applied to the solution more efficiently. As described above, differences in the solution surface shape occur depending on the induction heating frequency, so it is important to directly observe the contact state between the seed crystal and the solution. In particular, since this method uses a large-diameter wafer as a seed crystal, if the contact between the seed crystal and the solution is only partial, the possibility of voids formation increases.
This paragraph describes the influence of these differences in meniscus shapes on crystal growth. At lower frequency, the meniscus curvature is larger than at higher frequency, which likely affects heat removal from the meniscus. This process operates at temperatures around 2000∘C, and thus heat removal from solid or liquid surfaces is considered to be dominated by radiative heat transfer. As shown the red line in Figure. 4(b), at lower frequency, the meniscus surface is oriented further upward on the crystal side compared with that at higher frequency. Consequently, the radiative energy emitted from the meniscus at lower frequency is directed upward toward the crucible wall. In contrast, as shown the black line in Figure. 4(b), the meniscus surface on the crystal side is oriented more horizontally at higher frequency. As a result, the radiative energy emitted from the meniscus is directed downward compared with the lower frequency case. The crucible exhibits a vertical
temperature distribution depending on the relative positions of the crucible and the induction coil. Therefore, changes in the relative angle between the meniscus surface and the crucible wall alter the amount of heat extracted from the meniscus, which is considered to lead to differences in the lateral growth rate of the crystal. We believe that optimal growth conditions may depend on the induction heating frequency.
Figure 5 presents images of crystal growth recorded during the experiment; lateral crystal growth was observed in real time. Figure 5(b) shows the results 20 hours after Figure 5(a). Figure 6 shows a comparison of the crystal with the graphite holder obtained after the experiment and the image during crystal growth. As SiC crystal had grown about 3 mm in the lateral direction, the adjacent solution region shifted laterally. The crystal grows laterally, causing part of the crystal surface to become exposed above the solution. The emissivity of SiC differs from that of the solution surface, with the SiC surface exhibiting a higher emissivity. Consequently, significant heat removal due to thermal

[picture]

Fig. 5. (a) Initial state of the crystal growth and (b) after 20 hours of the crystal growth.

Fig. 5. (a) Initial state of the crystal growth and (b) after 20 hours of the crystal growth.

radiation occurs at the SiC crystal surface exposed from the solution surface, raising concerns about an increased crystal growth rate in that region. If the crystal growth rate becomes excessive, there is a high likelihood of inducing undesired crystal growth directions or polycrystallization. We believe that such phenomena can be prevented in advance through in situ observation. In other words, maintaining the required crystal shape becomes possible, which is expected to contribute to an improvement in the crystal growth yield. On the other hand, a comparison of the solution surface conditions shown in Figures 5(a) and (b) reveals that fluctuations of the solution were suppressed as the crystal expanded laterally. This behavior is presumed to result from a reduction in the free surface area of the solution. In future work, we plan to investigate changes in the surface condition as a function of solution composition.

Summary

The original version of this paper is available on https://www.scientific.net/SSP.393.41.pdf

[picture]

Fig. 6. Photograph of the graphite holder and the grown crystal edge with the in-situ observed image(under).

Fig. 6. Photograph of the graphite holder and the grown crystal edge with the in-situ observed image(under).

As a result of employing in-situ observation for SiC crystal growth by the solution method, changes in the solution surface morphology led to variations in the reflected images, enabling observation of the contact state between the seed crystal and the solution. The solution surface geometry was found to vary with the frequency of induction heating,
which was also confirmed by numerical simulations. The contact state between the crystal and the solution not only changes continuously over time due to factors such as crucible erosion and solution evaporation, but also depends strongly on the frequency of induction heating. Furthermore, it was pointed out that changes in the meniscus shape alter the radiative heat transfer between the solution surface and the crucible wall, indicating the potential for a significant impact on crystal growth. From these results, in-situ observation can be regarded as a useful tool for maintaining the meniscus formed between the solution and the crystal over long periods.

Acknowledgment

The original version of this paper is available on https://www.scientific.net/SSP.393.41.pdf

This paper is based on results obtained from a project, JPNP21029, subsidized by the New Energy and Industrial Technology Development Organization (NEDO).

References

The original version of this paper is available on https://www.scientific.net/SSP.393.41.pdf

T. Kimoto, H.Watanabe, Appl. Phys. Express 13120101 (2020).

K. Kusunoki, S. Munetoh, K. Kamei, M. Hasebe, T. Ujihara, K. Nakajima, Mater. Sci. Forum, 457-460 (2004), p. 123.

N. Watanabe, H. Yoshimoto, Y. Mori, A. Shima, Jpn. J. Appl. Phys. 61084001 (2015).

H. Daikoku, M. Kado, A. Seki, K. Sato, T. Bessho, K. Kusunoki, H. Kaidou, Y. Kishida, K. Moriguchi, K. Kamei, Cryst. Growth Des., 16 (2016), p. 1256.

T. Sakai1, M. Kado, H. Daikoku, S. Harada, T. Ujihara, The 77th Japan Society of Applied Physics Autumn Meeting, 15a-C302-1, 2016 [in japanese].

G. W. Liu, M. L. Muolo, F. Valenza, A. Passerone, Ceram. Int. 36 (2010) 1177-1188.

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Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 47-52

doi: 10.4028/p-Ro32jp

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-09-12

Revised:
2025-12-20

Accepted:
2026-02-23

Online:
2026-05-18

Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

The original version of this paper is available on https://www.scientific.net/SSP.393.47.pdf

S. Strüber 1,a, C. Grazzi 1,b, L. Tana 1,c, O. Schneider 1,d, T. Wagner 1,e, J. Wiedemann 1,f, P. Wunder 2, g, P. J. Wellmann h*

¹Crystal Growth Lab, Materials Department 6, ²Engineering Workshop, Faculty of Engineering, Friedrich-Alexander-Universität Erlangen-Nürnberg, 91058 Erlangen, Germany

a  sven.strueber@fau.de, b  cristina.grazzi@fau.de, clucrezia.tana@fau.de, d  ole.schneider@fau.de, 

e wato.t.wagner@fau.de, f jakob.wiedemann@fau.de, g philipp.wunder@fau.de, h*peter.wellmann@fau.de

Keywords: close space PVT, CS-PVT growth, 4H-SiC, bulk growth, thick epitaxy, doping.

Abstract

Close Space PVT (CS-PVT) is a modification of standard PVT exhibiting a short source-to-seed-distance and enabling a large variety of growth process variations to meet the specific requirements of the SiC material (i.e. special polytype and/or doping) to be grown. In this work, we study the growth of 4H−SiC p-i-n structures exhibiting thick SiC layers to be used as SiC photovoltaic cells for remote power transfer in space. Nevertheless, the found results are also applicable (i) to the SiC thick layer growth of power electronic devices and (ii) SiC pucks with a thickness of up to 10 mm . In addition, we present the new type of growth machine TableTopCS TM in its design being dedicated for the special crucible configuration of CS-PVT.

Introduction

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Recently silicon carbide (SiC) has proven to offer physical properties which are not only advantageous for power electronics, but also for photonic applications like photocatalytic water splitting, fluorescent SiC, and waveguide applications. In this field of application, special SiC bulk materials exhibiting intrinsic properties and p-type doping are needed. In addition to 4H−SiC, also 3C-SiC and 6 H -SiC are of importance. Close Space PVT (CS-PVT), which is a modification of standard PVT exhibiting a short source-to-seed-distance, enables a large variety of growth process variations to meet the specific requirements of the SiC material (i.e. special polytype and/or doping) to be grown. This for example enabled the bulk growth of 3C-SiC [1] which profits from a high supersaturation and a Si-rich gas phase composition. Indication for the high crystalline quality of CSPVT grown hexagonal SiC was already proven in the early work of Syväjärvi and Yakimova [2, 3].

In this work, we study the growth of 4H−SiCp−i−n structures to be used as SiC solar cells for remote power transfer in space using laser power converter (LPC) devices. Note: The presented growth method is also applicable for the fabrication of large area SiC wafers and p−/i−/n-layer stacks as used in power electronics. We used the CS-PVT method [4], which bridges the gap between the state-of-the-art bulk growth of SiC using the PVT method (boule thickness of 1−50 mm ) and the chemical vapor deposition (CVD) of thin SiC films in the thickness range of ca. 1 to 100μ m. In addition to the SiC growth study, we will also introduce the newly developed TableTopCS TM growth machine which meets special requirements for advanced CS-PVT growth. While this work mainly shows results of 100 mm4H−SiC layer deposition, growth cells of 150 mm CS-PVT are already applied in the lab.

In the following we are addressing in this study (i) the achieved 4H−SiC polytype stability and (ii) new aspects of advanced p-type doping by aluminum which are possible in the ballistic mass transport regime of CS-PVT.

Growth Experimental Procedure

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CS_PVT process.

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The CS-PVT growth configuration makes use of a solid SiC (single-)crystalline source and a single-crystalline seed which are separated by a spacer in the range of 0.5 to 2 mm . Mass transport from source to seed is established by establishment of a T-difference between source and seed. Typical axial T-gradients can be as low as a few ∘C/cm but may reach above 100∘C/cm. One technical solution to realize CS-PVT growth is to place basic CS-PVT stack out of SiC source, spacer and SiC seed in a standard PVT growth crucible as sketched in Fig. 1.

[picture]

Fig. 1. (a) Sketch of the CS.PVT growth cell [1]. (b) Examples of a standard PVT growth reactor hosting the CS-PVT growth cell.

Fig. 1. (a) Sketch of the CS.PVT growth cell [1]. (b) Examples of a standard PVT growth reactor hosting the CS-PVT growth cell.

TableTopCSTMGrowth Machine.

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In order to have more control of the growth parameters in CS-PVT, a new growth machine was designed and produced which heating system and technical implementation match the needs of the close space sublimation process. As indicated in the name "TableTopCS TM " the new system is a  compact setup with small footprint (Fig.2a) and which is designed for optional usage in cleanroom for electronic device fabrication.

[picture]

Fig. 2. (a) Sketch of the outer view of the new CS-PVT growth tool TablTopCS TM. (b) Greyscale optical image of one of the first 150 mm4H−SiC samples prepared in the new growth tool.

Fig. 2. (a) Sketch of the outer view of the new CS-PVT growth tool TablTopCS T M . (b) Greyscale optical image of one of the first 150 m m 4 H − S i C samples prepared in the new growth tool.

CS-PVT Growth Process Parameter Setting.

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The p-i-n structures were fabricated in two consecutive CS-PVT growth runs. As substrate we used 100 mm4H−SiC wafers ( 4∘ off-axis) either C -face or Si -face oriented to carry out homoepitaxial nucleation and growth of 4H−SiC (figure 1), respectively. The growth temperature measured at the top of the CS-PVT growth cell was 1900∘C (growth rate ca. 50μ m/h ). The background gas pressure was <0.1mbar. In the first step nitrogen doped n-type or nominally undoped, quasi-intrinsic layers (either residual n-type or residual p-type) with a thickness of ca. 100μ m layer were deposited (growth time =2 h ). Intentional p -type doping of the second thin top layer (growth time =10 min to 2 h ) was performed by using aluminum doped solid 4H−SiC:Al and 6H−SiC:Al sources which were prepared by the M-PVT method [5].

Results and Discussion

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Properties of4H−SiClayer stacks onC−faceseeds.

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In standard PVT growth above 2000∘C it is standard to grow a 4H−SiC crystal on c-face seeds. However, Si-face seeding fails, because of a heteroepitaxial transition of the polytype to 6H−SiC and 15−SiC.

[picture]

Fig. 3. (a) Examples of a high quality 4H−SiC layer (ca. 100μ m ) deposited on 100 mm4H−SiC Substrate (c-face). (b) Raman spectra of two CS-PVT grown 100μ m thick 4H−SiC layer on a Siface 4H−SiC ( 4∘ off-axis) substrate.

Fig. 3. (a) Examples of a high quality 4 H − S i C layer (ca. 100 μ m ) deposited on 100 m m 4 H − S i C Substrate (c-face). (b) Raman spectra of two CS-PVT grown 100 μ m thick 4 H − S i C layer on a Siface 4 H − S i C ( 4 ∘ off-axis) substrate.

Intentional p-type doping of the second thin top layer (growth time =10 min ) was performed by using aluminum doped solid 4H−SiC:Al and 6H−SiC:Al sources which were prepared by the M-PVT method [5] (see section "Doping during CS-PVT growth"). Also in this case, the 4H-SiC polytype prevailed.

Polytype stability of4H−SiClayers on Si-face seeds.

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As mentioned above, in standard PVT at temperatures above 2000∘C growth of bulk 4H−SiC fails, a polytype switching to 6H−SiC and 15R−SiC is observed. However, chemical vapor deposition (CVD) growth of 4H−SiC performed at 1600 to 1700∘C is routinely performed on Si -face SiC seed wafers. One important finding of this work is that 4H−SiC CS-PVT growth at 1900∘C is possible on Si -face substrates making CS-PVT growth compatible with the SiC device processing routine (on Si face substrates) exhibiting comparably high growth rates of 50 to 200μ m/h. The Raman spectrum in Fig. 4 proves the high 4H−SiC polytype stability when growth is carried out on the Si -face. This finding was not expected because often we find reports in literature indicating CS-PVT on Si -face (0001) oriented SiC wafers being favorable to switch to the cubic polytype 3C-SiC [6, 7].

[picture]

Fig. 4. Raman spectra of a CS-PVT grown 100μ m thick 4H−SiC layer on a Si-face 4H−SiC(4∘ offaxis) substrate.

Fig. 4. Raman spectra of a CS-PVT grown 100 μ m thick 4 H − S i C layer on a Si-face 4 H − S i C ( 4 ∘ offaxis) substrate.

The result suggests further exploration of the applicability of CS-PVT for the growth of intrinsic, thick 4H−SiC layers for power electronic applications. One of the challenges will be to limit the residual charge carrier concentration to values in the 1014−1015 cm−3 range.

Doping during CS-PVT growth.

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In sublimation growth doping of SiC by aluminum is rather challenging because of the much greater partial pressure of the Al gas species compared to Si - and C -related gas species (i.e. Si,Si2C and SiC2 ). Without special emphasis like in the M-PVT growth process, it is basically impossible to obtain homogeneous dopant incorporation. CS-PVT, however, enables a new growth mode for advanced doping which makes use of ballistic mass transport. At a low background gas pressure of <0.1 mbar we showed earlier [8] that ballistic mass transport dominates the mass transport between the closely spaced SiC source and SiC seed (distance <1 mm ). In such ballistic growth mode, the phenomenon of the partial pressure of atomic or molecular species does not exist and the species are directly transported from source to seed.

In this study, we demonstrate dopant transfer from the source to the seed using nitrogen. Unlike standard PVT, where nitrogen is added as a gaseous source, CS-PVT uses intentionally nitrogendoped SiC sources.

Table 1. Overview of the transfer of N dopants from the SiC source to the SiC seed/crystal in the CS-PVT growth system under ballistic growth conditions. Note that the dopant concentration was determined using Raman spectroscopy by analyzing the energetic position and shape of the LOPC peak.

Sample | SiC Source | T-growth | Ambient | Charge carrier concentration [cm⁻³]
|  |  |  | SiC source | SiC layer
K.170CS | n-type (N) | 1900°C | Vacuum | 1.7(±0.2)10¹⁸ | 1.1(±0.2)10¹⁸
K.187CS | n-type (N) | 1900°C | Vacuum | 2.8(±0.3)10¹⁷ | 7.7(±0.3)10¹⁷

4H-SiC p-i-n-layer stacks.

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Using the above describe deposition, p-i-n layer stacks were prepared comprising two subsequent growth runs for the nominally first intrinsic or better to say slightly n-type 4H−SiC layer and a second highly p-type doped 4H−SiC:Al layer. The growth time and layer thicknesses were 2 hours and 125 μm for the n-type layer and 10 minutes and 6μ m for the p-type layer (see sample cross section in Fig. 5), respectively.

[picture]

Fig. 5. Cross-sectional optical images of 4H−SiCp−i−n structure.

Fig. 5. Cross-sectional optical images of 4 H − S i C p − i − n structure.

Summary

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We have shown that CS-PVT has been successfully applied to grow thick C-face 4H−SiCp−i−n− layer stacks and with high polytype stability for application in photonic LPC devices.

We have demonstrated that even growth of 4H−SiC on Si -face 4H−SiC is possible with high polytype stability suggesting the usage of CS-PVT for the growth of thick intrinsic 4H−SiC layers for power electronic applications.

The establishment of a ballistic mass transport regime in CS-PVT enabled the efficient direct aluminum dopant transfer for fabrication of p-type SiC.

While the presented results are mainly shown for layers below 150μ m, in a previous study we already emphasized that CS-PVT is applicable to grow bulk SiC pucks of 3−5 mm in height. Technologically, to keep constant growth conditions a crystal height of ca. 10 mm should be achievable.

Acknowledgement

The original version of this paper is available on https://www.scientific.net/SSP.393.47.pdf

This work is funded by the European Union, Horizon Europe contract #101160868 (RePowerSiC).

References

The original version of this paper is available on https://www.scientific.net/SSP.393.47.pdf

F. La Via, M. Zimbone, C. Bongiorno, A. La Magna, G. Fisicaro, I. Deretzis, V. Scuderi, C. Calabretta, F. Giannazzo, M. Zielinski, R. Anzalone, M. Mauceri, D. Crippa, E. Scalise, A. Marzegalli, A. Sarikov, L. Miglio, V. Jokubavicius, M. Syväjärvi, R. Yakimova, P. Schuh, M. Schöler, M. Kollmuss,P. Wellmann, Materials, 14, 18, 5348 (2021).

M. Syväjärvi, R. Yakimova, P.-A. Glans, A. Henry, M. F. MacMillan, L. I. Johansson,E. Janzen, Journal of Crystal Growth, 198-199, 1-4, 1019 (1999).

R. Yakimova, N. Vouroutzis, M. Syväjärvi, J. Stoemenos, Journal of Applied Physics, 98, 3, 034905 (2005).

M. Kollmuss, M. Schöler, R. Anzalone, M. Mauceri, F. La Via, P. J. Wellmann, Materials Science Forum, 1062, 74 (2022).

P. Wellmann, P. Desperrier, R. Mueller, T. Straubinger, A. Winnacker, F. Baillet, E. Blanquet, J. M. Dedulle, M. Pons, Journal of Crystal Growth, 275, 1-2, e555 (2005).

V. Jokubavicius, G. R. Yazdi, R. Liljedahl, I. G. Ivanov, R. Yakimova, M. Syväjärvi, Crystal Growth and Design, 14, 12, 6514 (2014).

V. Jokubavicius, G. R. Yazdi, R. Liljedahl, I. G. Ivanov, J. Sun, X. Liu, P. Schuh, M. Wilhelm, P. Wellmann, R. Yakimova, M. Syväjärvi, Crystal Growth & Design, 15, 6, 2940 (2015).

T. Hupfer, P. Hens, M. Kaiser, V. Jokubavicius, M. Syväjärvi, P. J. Wellmann, Materials Science Forum, 740-742, 52 (2013).

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Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 53-58

doi: 10.4028/p-LHD7xc

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-09-12

Revised:
2025-12-20

Accepted:
2026-03-21

Online:
2026-05-18

Application of a Fine Grain 3C-SiC Powder Source Material during PVT Growth of 4H-SiC Crystals

The original version of this paper is available on https://www.scientific.net/SSP.393.53.pdf

J. Zöcklein 1,a, S. Strüber 1,b, C. Grazzi 1,c, N.-C. Arneberg 2,d, T. Straub 2,e, S. Greulich-Weber 2,f, P. J. Wellmann 1, g*

1 Crystal Growth Lab, Materials Department 6, Friedrich-Alexander-Universität Erlangen-Nürnberg, 91058 Erlangen, Germany

2 The Yellow SiC Company GmbH, Römereschstr. 33, 49090 Osnabrück, Germany

ªjulian.zoecklein@fau.de, b sven.strueber@fau.de, c cristina.grazzi@fau.de, d arneberg@yellowsic.com, e straub@yellow-sic.com, f greulich-weber@yellow-sic.com, g peter.wellmann@fau.de

Abstract

We have investigated the applicability of a new type of 3C−SiC powder source material during PVT growth which consist of a particle size of ca. 10μ m (aggregates up to ca. 150μ m ). Insitu X-ray visualization of 75 mm and 100 mm PVT growth runs showed a smooth SiC powder consumption during growth. Using Raman spectroscopy, we have found a high 4H−SiC polytype stability and a low residual stress distribution in the intentionally n-type doped grown crystals.

Keywords: PVT growth, 4H−SiC, source material, 3C−SiC, in-situ X-ray visualization.

Introduction

The original version of this paper is available on https://www.scientific.net/SSP.393.53.pdf

In PVT growth of SiC crystals, the proper choice of the SiC source material plays an important role because the grain size distribution and the effective packing density have a strong impact on the effective heat conductivity of the SiC source and therefore on the temperature field inside the growth cell [1]. Additionally, the effective surface area and the SiC polytype influence the gas phase composition and C/Si ratio. The latter being related to the different formation energy and surface energies of the various SiC polytypes [2]. Although SiC crystal growers hardly comment on their choice of the SiC powder source, often grain sizes above 500μ m are applied exhibiting a comparatively larger heat conductivity and lower effective surface of the SiC powder assembly [3]. Concerning the SiC source polytype, by trend the 6H−SiC polytype from direct Si+C synthesis or from purified Acheson material plays an important role in the global market. In addition, 3C−SiC stemming from a chemical vapor deposition synthesis is also applied in PVT growth.

In this work we have studied the application of a new type of small grain 3C-SiC powder source during PVT growth (aggregates of ca. 150μ m, single particle size of ca. 10μ m, The Yellow SiC Company GmbH ). In conjunction with the new patented [4] development of the 3 C SiC powder source, small batches of the material have been used in a 75 mm and 100 mm PVT system consisting of an in-situ 2D/3D computed tomography X-ray visualization tool [5].

Experiments

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PVT Growth Process.

The original version of this paper is available on https://www.scientific.net/SSP.393.53.pdf

Four PVT growth were carried out in a standard 75 mm and 100 mm PVT configuration [3] for 120 h at the growth temperature of ca. 2050∘C (crucible top) using nitrogen gas for n-type doping. The average growth rate was 125μ m/h. As seeds 4∘ off-axis (000-1) oriented 4H−SiC material was applied. Intentionally, no special efforts were made to adapt the growth process to the properties of the newly applied SiC source. Because of the variability of the thermal conductivity of the SiC source (e.g. expected lower thermal conductivity of the used small grain powder used in this study), the process window of 4H−SiC may slightly shift. Such issue could be addressed in a forthcoming iteration step, by slightly adjusting the hot zone design. All growth runs were monitored using in-situ X-ray visualization of the growth process [5].

SiC source Material.

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An ultra-pure fine-grain 3C-SiC powder source (Fig. 1) for 4 H -PVT growth, with single particle sizes of about 10μ m (aggregates up to approximately 150μ m )(Table 1). The material can be converted from 3 C into 6 H . Both SiC powder sources have already been successfully proven for 4 H -PVT growth and are available in large custom-made quantities.

[picture]

Fig. 1. Microscopic image of the 3C-SiC powder.
Table 1. Size distribution of the 3C−SiC powder source particles.

Fig. 1. Microscopic image of the 3C-SiC powder. Table 1. Size distribution of the 3 C − S i C powder source particles.

Results and Discussion

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SiC powder and crystal evolution.

The original version of this paper is available on https://www.scientific.net/SSP.393.53.pdf

Fig. 2 and 3 depict the evolution of the SiC crystal shape and the SiC source morphology using insitu X-ray visualization.

[picture]

Fig. 2. In-situ X-ray images of the gas-room area including the growing SiC-crystal ( 75 mm system) of the growth crucible. The evolution of a smooth and slightly convex growth interface is observed which indicated stable growth conditions.

Fig. 2. In-situ X-ray images of the gas-room area including the growing SiC-crystal ( 75 mm system) of the growth crucible. The evolution of a smooth and slightly convex growth interface is observed which indicated stable growth conditions.

[picture]

Fig. 3. In-situ X-ray images of the SiC-source area of the crucible at the beginning and at the end (before cooling down) of the growth process. As intended, the SiC source shrinks in the central area.

Fig. 3. In-situ X-ray images of the SiC-source area of the crucible at the beginning and at the end (before cooling down) of the growth process. As intended, the SiC source shrinks in the central area.

The SiC crystal (Fig. 2) exhibits throughout the complete growth process a stable and slightly convex growth interface, which enables outgrowth of structural defects. The corresponding X-ray images of the SiC source (Fig. 3) confirm the overall favorable growth conditions. The final shape of the residual SiC source material indicates that a steady SiC gas species transport took place from the hot crucible walls (inner side wall and crucible bottom) towards the central SiC source core and upward to the SiC source top. In addition, no upgrowth into the gas room is observed, which would interfere with the growing SiC crystal.
Fig. 4 depicts a series of in-situ X-ray images of the SiC powder evolution in the 100 mm PVT system. The packing density of the SiC source material inside the growth cell is ca. 45%. Note: This value is currently further increased to the widely desired value between 50 and 60%. From the beginning of the growth process, a dense disk-like structure is formed on the top of the SiC powder which shields the crystal growth area above from the further SiC source evolution below [6, 7]. Allover, a smooth consumption of the SiC powder is observed throughout the growth process. Like in the 75 mm system (Fig. 3), again no upgrowth into the gas room is observed, which would interfere with the growing SiC crystal. Also in the 100 mm PVT system, the crystal growth interface exhibits the targeted, only slightly convex growth interface ( 91 h growth stage in Fig. 4). The observed SiC powder consumptions in the 75 mm and 100 mm system follow quite well the reference growth runs in the former reports in [8] and [9], respectively.

[picture]

Fig. 4. In-situ X-ray images of the SiC-source area of the growth crucible ( 100 mm system) at three stages (shortly after start, mid-time, almost end) of the growth process.

Fig. 4. In-situ X-ray images of the SiC-source area of the growth crucible ( 100 mm system) at three stages (shortly after start, mid-time, almost end) of the growth process.

The fine grain 3C−SiC powder studied in this work performs in both PVT systems ( 75 mm and 100 mm) in a way that stable growth conditions are observed. Note: It was not investigated at which growth stage the 3C−SiC powder may have switched to 6H−SiC polytype by sublimation and recrystallization.

Properties of the grown crystals and prepared wafers.

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Fig. 5 a depicts an optical image of a 75 mm SiC wafer cut from the SiC boule shown in the in-situ X-ray image in Fig. 2 ( 120 h stage). Although the SiC source deviates in its morphologic properties from "unofficial" specks of many crystal growers in the SiC PVT field, a very high 4H-SiC polytype stability is observed during PVT growth. The brownish-orange color in the optical wafer image in Fig. 5a indicates the 4H-SiC polytype stability. No unintentional polytype switches to 6H−SiC or 15 R SiC are observed. Raman measurements (Fig. 5b) further confirm the high 4H−SiC polytype stability and indicate a charge carrier concentration of 2*1018 cm−3 which (because of incomplete electrical activation of the donors) corresponds to an intended high chemical nitrogen incorporation of ca. 68*1018 cm−3, almost 1019 cm−3, as typical in commercial wafers.

[picture]

Fig. 5. (a) Optical mapping of a wafer ( 75 mm growth run) close to the crystal cap. (b) Raman spectrum of the sample.

Fig. 5. (a) Optical mapping of a wafer ( 75 mm growth run) close to the crystal cap. (b) Raman spectrum of the sample.

The SiC wafer exhibits a residual stress level of 25(+/−10)MPa which is quite a low value for the special small growth cell used in this study. In principle, the low value could also be related to stress relaxation after cracking.

[picture]

Fig. 6. Optical image of the step structure of the crystal cap of a 75 mm (a) and 100 mm (b) SiC crystal presented in the in-situ X-ray images of Fig. 2 and Fig. 4. The macro-step height is about 3−10(±0.5)μm(a) and 1.5−2.5(±0.5)μm(b), respectively.

Fig. 6. Optical image of the step structure of the crystal cap of a 75 mm (a) and 100 mm (b) SiC crystal presented in the in-situ X-ray images of Fig. 2 and Fig. 4. The macro-step height is about 3 − 10 ( ± 0.5 ) μ m ( a ) and 1.5 − 2.5 ( ± 0.5 ) μ m ( b ) , respectively.

Nevertheless, the reported low values in this study were found in the center of the large wafer piece in Fig. 5a which already reflects very good bulk property and cannot be explained by stress-release due to the cracking phenomena alone.
The post growth analysis of the growth step structure at the crystal cap (Fig. 6) indicate ideal conditions for 4H−SiC growth stability as they have been documented in literature for a high C/S ratio in the gas phase and nitrogen doping (see e.g. [10]). The smooth growth interface exhibits macrosteps with a varying distance of 50 to 500μ m (macro-step height of ca. 3−10(±0.5)μm ) and 20 to 100μ m (macro-step height of ca. 1.5−2.5(±0.5)μm ), respectively. Because of the asymmetric motion kinetics of the steps due to nitrogen doping [11, 12] the probability of unintentional polytype changes is reduced and 4H−SiC growth is stabilized.

Summary

The original version of this paper is available on https://www.scientific.net/SSP.393.53.pdf

We have found that the newly developed fine grain 3C−SiC source material enables a smooth sublimation-recrystallization evolution of the SiC powder source. Noteworthy, no adaption of the hotzone design was carried out compared to the often used FAU 6H−SiC powder with a larger grain size in the 300−500μ m range. Hence, the application of the new 3C−SiC source did not demand any growth procedure adaptation.
A technologically relevant high 4H−SiC polytype stability is observed which is supported by the quantitative analysis of the step structure at the crystal cap proving stable/smooth 4H−SiC growth conditions

Acknowledgement

The original version of this paper is available on https://www.scientific.net/SSP.393.53.pdf

This work was financially supported by The Yellow SiC Company GmbH, Germany.

References

The original version of this paper is available on https://www.scientific.net/SSP.393.53.pdf

M. Arzig, M. Salamon, N. Uhlmann, B. A. Johansen, P. J. Wellmann, Materials Science Forum, 924, 245 (2018), 10.4028/www.scientific.net/MSF.924.245.

Y. M. Tairov, V. F. Tsvetkov, Progress in Crystal Growth Characterization, 7, 111 (1983), 10.1016/0146-3535(83)90031-X.

P. J. Wellmann, Semicond. Sci. Technol., 33, 103001 (21pp) (2018), 10.1088/13616641/aad831.

S. Greulich-Weber, Device and method for the production of silicon carbide, WO2023148108A1, 2023, WO2023148108A1.

P. Wellmann, G. Neubauer, L. Fahlbusch, M. Salamon, N. Uhlmann, Crystal Research and Technology, 50, 1, 2 (2015), 10.1002/crat.201400216.

P. J. Wellmann, M. Bickermann, D. Hofmann, L. Kadinski, M. Selder, T. L. Straubinger, A. Winnacker, Journal of Crystal Growth, 216, 263 (2000), 10.1016/s0022-0248(00)00372-9.

P. J. Wellmann, D. Hofmann, L. Kadinski, M. Selder, T. L. Straubinger, A. Winnacker, Journal of Crystal Growth, 225, 312 (2001), 10.1016/s0022-0248(01)00881-8.

J. Steiner, M. Arzig, T. C. Hsiao, P. J. Wellmann, Materials Science Forum, 963, 42 (2019), 10.4028/www.scientific.net/MSF.963.42.

O. M. Ellefsen, M. Arzig, J. Steiner, P. Wellmann, P. Runde, Materials, 12, 19, 3272 (2019), .

M. Arzig, U. Künecke, M. Salamon, N. Uhlmann, P. J. Wellmann, Journal of Crystal Growth, 576, 126361 (2021), 10.1016/j.jcrysgro.2021.126361.

N. Ohtani, M. Katsuno, T. Aigo, T. Fujimoto, H. Tsuge, H. Yashiro, M. Kanaya, Journal of Crystal Growth, 210, 4, 613 (2000), 10.1016/s0022-0248(99)00877-5.

N. Ohtani, M. Katsuno, T. Aigo, H. Yashiro, M. Kanaya, Materials Science Forum, 338-342, 379 (2000), 10.4028/www.scientific.net/msf.338-342.379.

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Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 59-64

doi: 10.4028/p-NdIf3k

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-09-23

Revised:
2026-02-04

Accepted:
2026-02-23

Online:
2026-05-18

Optimization of Seed Crystal Stability at the Initial Growth Stage Depending on Heating Ramp Rates and Gas Flow Channels of SiC Source Powder for Growth of 8-inch n-Type 4H-SiC Single Crystal

The original version of this paper is available on https://www.scientific.net/SSP.393.59.pdf

Chae-Young Lee 1,a*, Su-Ho Kim 1,b, Jung Woo Choi 1,c, Myung-Ok Kyun 1,d, Jung Gyu Kim 1,e, Kap-Ryeol Ku 1,f, Yeon-Suk Jang 1, g, Jung-Gon Kim 2, h, Won Jae Lee 2,, *

1 Senic, 17-15, 4sandan 7-ro, Jiksan-eup, Seobuk-gu, Cheonan-si, Chungcheongnam-do, Republic of Korea

2 Dong-Eui University, 176, Eomgwang-ro, Busanjin-gu, Busan, Republic of Korea

a  cylee@eincrystal.co.kr, b  shkim@eincrystal.co.kr, c  jwchoi@senic.co.kr, d  bjk006@eincrystal.co.kr, ejgkim@senic.co.kr,  krku@senic.co.kr, g  ysjang@senic.co.kr, h  kimjg@deu.ac.kr, ileewj@deu.ac.kr 

Abstract

Seed crystal stabilization during the initial stage of 200−mm4H−SiC crystal growth is critical for achieving high-quality wafers with large diameters. This study investigated the effects of heating ramp rates ( 0−6∘C/min ) and SiC source powder porosity through both simulation and experimental approaches. Low ramp rates resulted in surface degradation of the seed crystal, whereas high ramp rates induced significant thermal stress, leading to cracking. Optimal ramp rates of 3−5∘C/ min significantly minimized damage caused by seed crystal loss. Furthermore, high-porosity source powder facilitated adequate gas transport channels, thereby enhancing seed crystal stability. Crystals grown under these optimized conditions demonstrated improved edge morphology, absence of polycrystalline inclusions, and low dislocation densities, with threading screw dislocations (TSD) below 500 cm−2 and basal plane dislocations (BPD) below 1,000 cm−2. These results demonstrate that precise control of thermal parameters and source powder porosity offers an effective strategy for stable seed attachment and reproducible growth of high-quality, large-diameter SiC single crystals.

Keywords: 4H−SiC,8-inch SiC growth, Physical vapor transport, Single crystal, Ramp rates, Gas flow, Source powder

Introduction

The original version of this paper is available on https://www.scientific.net/SSP.393.59.pdf

The next generation of wireless infrastructure will rely on wide bandgap semiconductors such as SiC and GaN due to their superior physical properties, including a large bandgap, high thermal conductivity, and high breakdown field. [1,2] In the SiC wafer-based device industry, increasing the wafer diameter is critically needed to enhance economic viability and production efficiency. [3, 4] Current research is intensively aimed at producing high-quality 8 -inch SiC crystal ingots, with a strong focus on preventing internal polycrystalline inclusions. Ensuring the stability of the seed crystal during the initial growth stage is essential for achieving reliable and consistent crystal growth. In this study, we investigated the effects of heating ramp rates and source powder porosity on the growth of 8-inch 4H-SiC crystals. These factors can influence damage to the seed crystal during the initial growth stage, as well as affect the quality of the final crystal. Prolonged thermal exposure at low ramp rates leads to surface degradation and seed crystal detachment at the initial growth stage. In contrast, a fast ramp rate can induce steep thermal gradients, increasing the thermal stress mismatch between the seed crystal and the graphite lid, which often leads to cracking and seed detachment. [5, 6] To address these issues, SiC powders with varying porosities were utilized to optimize gas transport channels under appropriate heating ramp rates, aiming to stabilize the flow of sublimated gas species during the initial growth stage.

Experiments

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The growth of 200−mm4H−SiC crystals was conducted at temperatures ranging from 2300 to 2400∘C under a growth pressure of 20 torr, using both N2 and Ar atmospheres. 4∘ off-axis, c-face substrates were used as seed crystals. Simulations were conducted using Virtual Reactor software (STR Software) during the initial growth process with heating ramp rates ranging from 0 to 6∘C/min. Additionally, seed crystal damage tests were performed based on the porosity of the SiC source powder. The defect density near the top (facet region) and bottom (near seed region) of SiC crystals grown under high gas flow conditions was examined following KOH etching. The spatial distribution of defects, including micropipes, inclusions, and stacking faults, was analyzed using a Candela system (KLA-Tencor Corp.).

Result and Discussion

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Figure 1 (a) presents a schematic diagram of the experimental setup. The left diagram shows the thermal field at higher ramp-up rate, while the right one depicts that at a lower ramp-up rate near the seed region. Simulations were performed in the initial process with heating ramp rates ranging from 0 to 6∘C/min. Figurel (b) exhibited the relationship between the seed loss-induced damage width (mm) and the heating ramp rate ( ∘C/min ) during the initial stage of crystal growth. The damage width represents the actual measured length from the single crystal toward the crystal edge where degradation begins, as identified through optical microscopy of the grown ingot. It is clear that ramp rates of 3~5∘C/min can effectively decrease the damage width of seed crystal. Compared with the narrower thermal field at a lower ramp-up rate, a higher ramp-up rate broadens the thermal field, thereby reducing thermal etching in the seed region and consequently decreasing seed damage. The determination coefficient (R2=0.9433) signifies that the trend line accounts for approximately 94.3% of the variation in damage width ( mm ) relative to ramp rate ( ∘C/min ), demonstrating a strong correlation between ramp rate adjustments and the extent of seed crystal damage reduction.

[picture]

Fig. 1 Schematic diagram of the experimental setup configuration and (b) plot of seed loss-induced damage width ( mm ) as a function of heating ramp rates ( ∘C/min ) at the initial growth stage. R2 shows the result of quadratic curve-fitting.

Fig. 1. Schematic diagram of the experimental setup configuration and (b) plot of seed loss-induced damage width ( mm ) as a function of heating ramp rates ( ∘ C / m i n ) at the initial growth stage. R 2 shows the result of quadratic curve-fitting.

Figure 2 shows (a) a schematic illustration of gas flow channel distributions in the SiC source powder region under low and high porosity conditions, and (b) the variation of damage width (mm) as a function of the gas flow channel formed within the source powder. The damage width of the seed crystal was significantly reduced under conditions of high gas flow channels (high porosity) in the SiC source powder. The determination coefficient (R2=0.9611) indicates that the trend line explains approximately 96.1% of the variation in damage width ( mm ) with respect to the powder porosity of the SiC source powder, highlighting a marked correlation between gas flow channel adjustments and the reduction of seed crystal damage. Based on the simulation results, crystal growth experiments were carried out by the PVT method using two configurations with different ramp rates and source powder porosities.

[picture]

Fig. 2 (a) Schematic diagram of the channel distributions for gas flow at low and high porosity of SiC source powder and (b) plot of the damage width (mm) as a function of the gas flow channel of the SiC source powder. R2 shows the result of quadratic curve-fitting.

Fig. 2. (a) Schematic diagram of the channel distributions for gas flow at low and high porosity of SiC source powder and (b) plot of the damage width (mm) as a function of the gas flow channel of the SiC source powder. R 2 shows the result of quadratic curve-fitting.

Figure 3 presents the numerical simulation results illustrating the effect of source material porosity on the internal thermal distribution and the resulting mass transport characteristics driven by the temperature gradient between the source and the seed. Porosity determines the resistance to gas-phase transport through the source material. Higher porosity generally increases the permeability, allowing for more efficient mass transport. The six measurement points in the graphite crucible are defined as follows: P 1 , center of the crystal; P 2 , edge of the crystal; P3−P4, surface of the source material; and P5-P6, bottom of source material. With increasing porosity ( 0.2 to 0.7 , ), an enhancement in vapor transport of SiC source species from the source is observed.

[picture]

Fig. 3 Numerical simulation of the effect of source material porosity on internal thermal gradients and mass-transport characteristics. The six measurement points in the graphite crucible are defined as follows: P 1 , center of the crystal; P 2 , edge of the crystal; P3−P4, surface of the source material; and P5-P6, bottom of source material.

Fig. 3. Numerical simulation of the effect of source material porosity on internal thermal gradients and mass-transport characteristics. The six measurement points in the graphite crucible are defined as follows: P 1 , center of the crystal; P 2 , edge of the crystal; P 3 − P 4 , surface of the source material; and P5-P6, bottom of source material.

Figure 4 presents the dependence of (a) mass source, (b) sublimation rate, (c) C/Si ratio, (d) SiC2 ratio, (e) Si2C ratio and (f) Si ratio on the porosity of the source material. These ratios (SiC2,Si2C,Si ratio, dimensionless quantity) represent the partial pressure share or mole fraction of each species within the total gas phase. Notably, at a porosity of 0.4 , the C/Si ratio in the seed surface region reached a stabilized state. This stabilization is attributed to the simultaneous increase in carbon-carrying species SiC2 and Si2C and a corresponding decrease in the Si ratio, suggesting that a porosity of 0.4 provides an optimal balance between thermal distribution and gas-phase stoichiometry for high-quality SiC growth. Figure 5 shows optical images (left half) and UVF images (right half) of SiC ingots grown under (a) non-optimal porosity and (b) optimal porosity conditions of the source powder.

Due to the minimized seed crystal loss, the SiC ingot grown at a porosity of 0.4 exhibited superior edge quality and was free of polycrystalline regions compared with ingots grown under other porosity conditions.

[picture]

Fig. 4 Dependence of (a) mass source, (b) sublimation rate, (c) C/Si ratio, (d) SiC2 ratio, (e) Si2C ratio and (f) Si ratio on the porosity of the source material. SiC2,Si2C, and Si ratios are dimensionless quantities.

Fig. 4. Dependence of (a) mass source, (b) sublimation rate, (c) C / S i ratio, (d) S i C 2 ratio, (e) S i 2 C ratio and (f) Si ratio on the porosity of the source material. S i C 2 , S i 2 C , and Si ratios are dimensionless quantities.

[picture]

Fig. 5 Optical images (left half) and UVF images (right half) of SiC ingots grown under non-optimal porosity (a) and optimal porosity (b) conditions of the source powder. The bluish regions at the upper and lower ends of the ingots represent optical illusions caused by interference.

Fig. 5. Optical images (left half) and UVF images (right half) of SiC ingots grown under non-optimal porosity (a) and optimal porosity (b) conditions of the source powder. The bluish regions at the upper and lower ends of the ingots represent optical illusions caused by interference.

Defect densities at the top (near the surface region) and bottom (near the seed region) of the SiC crystal grown under optimal porosity conditions (porosity: 0.4 ) were investigated after KOH etching and are summarized in Table 1. Both threading screw dislocation (TSD) and basal plane dislocation (BPD) densities were found to be below 500 cm−2 and 1,000 cm−2, respectively, indicating high crystalline quality. As shown in Fig. 6, growth under optimal porosity conditions resulted in low TSD and BPD densities, confirming the high crystal quality. Moreover, defect densities at the top and bottom of the wafer were comparable.

Table 1. Defect densities of the SiC crystal measured at the top (facet region) and bottom (near seed region) after KOH etching, under optimal porosity growth conditions.

Measurement positions | TSD (ea/cm²) | BPD (ea/cm²) | TED (ea/cm²) | EPD (ea/cm²)
Top | 450 | 1,000 | 2,100 | 3,550
Bottom | 480 | 920 | 2,300 | 3,700

*Threading Screw Dislocation (TSD), Basal Plane Dislocation (BPD), Threading Edge Dislocation (TED),
Etch Pit Density (EPD)

Fig. 6 Defect levels at the top (near surface) and bottom (near seed) of SiC crystals grown under optimal porosity conditions, measured using a Candela system (KLA-Tencor Corp.).

Summary

The original version of this paper is available on https://www.scientific.net/SSP.393.59.pdf

This study demonstrates that optimizing process parameters during the initial stage of SiC single crystal growth is crucial for minimizing damage caused by seed loss. Both simulations and experimental results confirm that heating ramp rates between 3 and 5∘C/min combined with higher porosity of the SiC source powder significantly reduce seed damage. SiC ingots grown under these optimized conditions exhibit superior edge quality, absence of polycrystalline regions, and low dislocation densities (TSD <500 cm−2,BPD<1,000 cm−2 ). These findings establish an effective process strategy for producing high-quality SiC single crystals and provide practical guidance for large-diameter crystal growth.

Acknowledgements

The original version of this paper is available on https://www.scientific.net/SSP.393.59.pdf

This work was supported by Technology Innovation Program (Project Number: 00402234, Project Name: Development of highly flat, highly clean large area polished SiC single crystal wafers by utilizing advanced process technology for power semiconductor application) funded by the Ministry of Trade, Industry and Energy.

References

The original version of this paper is available on https://www.scientific.net/SSP.393.59.pdf

J. R. Jenny, D. P. Malta, St G. Müller, A. R. Powell, V. F. Tsvetkov, H. McD Hobgood, R. C. Glass, C. H. Carter Jr., Journal of Electronic Materials, 32, 432-436 (2003).

M. V. S. Chandrashekhar, I. Chowdhury, P. Kaminski, R. Kozlowski, P. B. Klein and T. Sudarshan, Applied Physics express 5, 025502 (2012).

I. Manning, K. Moeggenborg, A. Soukhojak, J. Searson, M. Gave, G. Chung, E. Sanchez, Materials Science Forum, 1062, 54-58 (2022).

S. Zhang, G. Fu, H. Cai, J. Yang, G. Fan, Y. Chen, T. Li, L. Zhao, Materials, 16(2), 767 (2023).

J. Steiner, P. J. Wellmann, Materials, 15(5), 1897 (2022).

J. Pezoldt, V. Cimalla, Crystals, 10(6), 523 (2020).

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Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 65-70

doi: 10.4028/p-gZ2hnG

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-09-26

Revised:
2025-12-10

Accepted:
2026-02-23

Online:
2026-05-18

Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

The original version of this paper is available on https://www.scientific.net/SSP.393.65.pdf

Birgit Kallinger 1,a*, Christian Gobert 1, b, Maximilian Titl 1,c, Robin Karhu 1, d, Johannes Köhler 2,e and Jürgen Erlekampf 2,f

1 Fraunhofer IISB, Schottkystr. 10, 91058 Erlangen, Germany

2 AIXTRON SE, Schottkystr. 10, 91058 Erlangen, Germany

a*birgit.kallinger@iisb.fraunhofer.de,b christian.gobert@iisb.fraunhofer.de, c  maximilian.titl@iisb.fraunhofer.de, d  Robin.Karhu@iisb.fraunhofer.de, ej.koehler@aixtron.com,  fj.erlekampf@aixtron.com

Keywords: epitaxial growth, precursors, defects, isotopically enriched, quantum technology.

Abstract

This paper compares ethene and methane precursors for homoepitaxial 4H−SiC growth in planetary reactors with regards to their impact on growth rate and defectivity of the epilayers. Therefore, a comprehensive experimental study has been performed in AIXTRON G10-SiC and G5WW C planetary reactors using a standard process based on ethene and trichlorosilane precursors with conventional 150 mm n-type 4H-SiC substrates from 3 different international suppliers. Methane substituted ethene as precursor in many experiments. It was found that methane precursor can compete with ethene in terms of growth rate, epilayer thickness, and defectivity of the epilayers. By using isotopically enriched methane, Si12C epilayers with a 12C concentration of 99.96% have been grown which can be used for SiC-based quantum technology.

Introduction

The original version of this paper is available on https://www.scientific.net/SSP.393.65.pdf

Silicon Carbide (4H−SiC) has outstanding properties for applications in energy efficient power electronics and has been maturing with regards to material quality and device processing technology. Now, the SiC processing costs need to be reduced and the efficiency with regards to energy and resource consumption needs to be improved. For these reasons, we are testing alternative precursors such as methane (CH4) and tetrachlorosilane (SiCl4). These alternatives may enable higher growth rates, better material quality [1] and lower processing costs. Additionally, methane can act as an isotopically enriched precursor for growth of epilayers with a controlled 12C isotope concentration different from the natural isotope mixing ratio, which could be an enabler for SiC -based quantum technology due to the control of the nuclear spin bath concentration. SiC is a very promising candidate for quantum applications due to its silicon vacancy ( Vsisi , which acts as a color center [2] and its mature processing technology. Depending on the desired quantum application, specific isotope concentrations are required, such as a total concentration of 1.0 to 1.5% of 13C and 29Si for nuclear spin qubits addressable as quantum memories [3,4]. Hence, the 13C and 29Si concentrations need to be reduced by using isotopically enriched precursors during epitaxial growth. In the carbon case, methane (CH4) can be purchased with a nominal 12C concentration of 99.99%. This paper investigates the epitaxial growth using methane as a precursor and the characterization of the grown epilayers.

Experimental

The original version of this paper is available on https://www.scientific.net/SSP.393.65.pdf

For this study, conventional n-type 4H-SiC substrates with a diameter of 150 mm from three international vendors A,B, and C were used for epitaxial growth studies in AIXTRON planetary reactors G5WW C and G10-SiC, which are operated in our joint development lab in Erlangen, Germany. The standard growth process is based on ethene and trichlorosilane precursors and uses nitrogen doping for n-type epilayers with the Multi-Ject® technology. This process was adapted to utilize methane as carbon precursor, while trichlorosilane (TCS) was further used as (standard) silicon precursor. The ethene precursor was substituted by methane. Once a suitable methane-based epitaxial
growth process was developed, isotopically purified methane with 99.99%12C and ultra-low nitrogen concentration ( <3ppm ) was employed.

The epilayers grown in this study were characterized with regards to epilayer thickness, doping concentrations and defects by FTIR with a Semilab EIR 2300, capacitance-voltage (CV) measurements with mercury probers, and UV excited photoluminescence imaging (UVPL) in combination with differential interference contrast (DIC) microscopy with a Lasertec SICA 88. Minority carrier lifetime mappings were measured by microwave-detected photoconductivity decay ( μ-PCD) method [5] with a Semilab WT-2000. The 12C isotope concentration was determined by secondary ion mass spectroscopy (SIMS).

Results

The original version of this paper is available on https://www.scientific.net/SSP.393.65.pdf

Growth rate.

The original version of this paper is available on https://www.scientific.net/SSP.393.65.pdf

Many comprehensive growth experiments were conducted in both G5WW C and G10-SiC planetary reactors with ethene or methane precursor. Buffer layers with a thickness of 1μ m to 2μ m were grown as well as drift layers with a thickness up to 40μ m. The epilayer thickness is plotted as a function of the growth time in Fig. 1. The data points were linearly fitted and the slope of the fit yields the typical growth rate of 30μ m/h for both ethene- and methane-based growth processes. Further experiments will be done to increase the growth rate.

[picture]

Fig. 1. Epilayer thickness as a function of growth time for different planetary reactors with different C precursors ethene (standard C precursor) and methane (new C precursor). The slope of the linear fitting, displayed as black dotted line, gives a growth rate of 30 μm/h for these experiments.

Fig. 1. Epilayer thickness as a function of growth time for different planetary reactors with different C precursors ethene (standard C precursor) and methane (new C precursor). The slope of the linear fitting, displayed as black dotted line, gives a growth rate of 30 μ m / h for these experiments.

Defectivity of epilayers.

The original version of this paper is available on https://www.scientific.net/SSP.393.65.pdf

The defectivity of all epiwafers was measured by UVPL and DIC microscopy in a Lasertec SICA 88. Those epiwafers which comply with a 1,200 V epilayer specification (i.e. thickness: 10−14μ m, n-type doping concentration of ( 0.8−2 ) ×1016 cm−3 ) were further analyzed with regards to yield prediction assuming 5×5 mm2 die size and 3 mm edge exclusion. Stacking faults (SF), polytype inclusions, particle inclusions, PL stacking faults as well as PL propagated SF were considered for the yield prediction. Figure 2 shows the defect distribution (of mentioned defect classes) and the yield prediction for epilayers grown on substrates from vendor A,B (in G10−SiC reactor) and vendor C (in G5WW C reactor).

The killer defect density of such 1,200 V epilayers varied between 0.13 cm−2 and 0.94 cm−2 for different substrate vendors and reactor types. Accordingly, the device yield varied from 81.5% to 97.3%, which is comparable to results from conventional ethene based epigrowth processes.

[picture]

Fig. 2. Defect mappings and yield prediction for epilayers grown in different planetary reactors with methane precursor on substrates from different vendors.

Fig. 2. Defect mappings and yield prediction for epilayers grown in different planetary reactors with methane precursor on substrates from different vendors.

Carrier lifetime in epilayers.

The original version of this paper is available on https://www.scientific.net/SSP.393.65.pdf

The effective minority carrier lifetime in 1,200 V epiwafers was measured by μ−PCD method without any sample preparation. Effective lifetimes are depending on the minority carrier lifetime in the epilayer ("bulk lifetime"), on surface recombination at the epilayer surface, and the epilayer thickness or distance to the highly doped substrate. The epilayer thickness of about 10μ m of all investigated epilayers is comparable and the as-grown surfaces were untreated, the effective lifetimes are an indicator for the "bulk lifetime" in the epilayer. Figure 3 shows a comparison of lifetime maps from epilayers grown in ethene- and methane-based epitaxy processes.

[picture]

Fig. 3. Effective minority carrier lifetime mappings of 1,200 V epilayers grown with a methane based epigrowth process (a) and conventional ethene-based process (b) with the same color scale from 50 ns (red) to 230 ns (blue). Edge exclusion is 3 mm .

Fig. 3. Effective minority carrier lifetime mappings of 1 , 200 V epilayers grown with a methane based epigrowth process (a) and conventional ethene-based process (b) with the same color scale from 50 ns (red) to 230 ns (blue). Edge exclusion is 3 mm .

The effective carrier lifetime mappings show the typical radially symmetric lifetime distribution, which depends on the lateral thickness and doping concentration profiles of epilayers. No larger defects, like e.g. stacking faults, dislocation networks or defect clusters, are visible as "red spots" with shorter lifetimes. The mean effective minority carrier lifetime is 163 ns for the epilayer out of the methane-based process and 119 ns for the epilayer from ethene-based growth, i.e. the effective lifetime of the methane-based epilayer is slightly higher than that of the conventional epigrowth process. We measured more than 300 epiwafers with 1,200 V specification by μ-PCD and found that their mean effective lifetime is typically about 115 ns [6], which compares well to the calculated effective lifetime of 130 ns [6] for typical 1,200 V epilayers. We will further investigate if the methane based epigrowth can significantly increase the effective and bulk lifetime in the epilayer and the physical reasons. Point defect concentrations in the epilayers from different precursors and reactor types will be determined by deep level transient spectroscopy (DLTS).

IsoPureSi12Cepilayers.

The original version of this paper is available on https://www.scientific.net/SSP.393.65.pdf

After developing a methane-based growth process with good epilayer quality at 30μ m/h growth rate, isotopically enriched methane was used as precursor. Inserting methane with 99.99%12C into the reactor resulted in a 12C concentration of 99.96% in the epilayer as shown in Fig. 4. This result indicates clearly that almost no carbon exchange takes place between the precursor species in the gas phase and the growing epilayer on one hand side and the SiC deposition in the planetary reactor on the other side.

[picture]

Fig. 4. Isotope concentration (determined by SIMS) for epilayers grown with different methane precursor, i.e. conventional methane and isotopically enriched methane.

Fig. 4. Isotope concentration (determined by SIMS) for epilayers grown with different methane precursor, i.e. conventional methane and isotopically enriched methane.

Acknowledgement

The original version of this paper is available on https://www.scientific.net/SSP.393.65.pdf

This work was funded by the German Federal Ministry for Economic Affairs and Climate Action (BMWK) as part of project 03EN4084B.

Summary

The original version of this paper is available on https://www.scientific.net/SSP.393.65.pdf

The conventional ethene precursor was substituted by methane precursor for comprehensive growth studies in AIXTRON planetary reactors G10-SiC and G5WW C on 150 mm SiC substrates. The growth rate, epilayer thickness and doping concentrations as well as the defectivity of epilayers was comparable for both methane- and ethene-based epigrowth processes. Furthermore, "IsoPure" epilayers with a 12C concentration of 99.96% were grown for use in quantum-based applications. The point defect content of epilayers will be further investigated by DLTS measurements to deepen the understanding of the effective minority carrier lifetime. Further experiments will be done to increase the growth rate to more than 30μ m/h.

References

The original version of this paper is available on https://www.scientific.net/SSP.393.65.pdf

M. Ghezellou, J. Ul-Hassan, J.; Phys. Status Solidi B, 261: 2300535 (2024); https://doi.org/10.1002/pssb.202300535.

N. T. Son, C. P. Anderson, A. Bourassa, K. C. Miao, C. Babin, M. Widmann, M. Niethammer, J. Ul Hassan, N. Morioka, I. G. Ivanov, F. Kaiser, J. Wrachtrup, D. D. Awschalom; Appl. Phys. Lett. 116, 190501 (2020); .

Shravan K. Parthasarathy, B. Kallinger, F. Kaiser, P. Berwian, D.B.R. Dasari, J. Friedrich, R. Nagy, PHYSICAL REVIEW APPLIED 19, 034026 (2023).

Bourassa, A., Anderson, C.P., Miao, K.C. et al.; Nat. Mater. 19, 1319-1325 (2020). .

B. Kallinger, P. Berwian, J. Friedrich, M. Rommel, M. Azizi, C. Hecht, P. Friedrichs; Materials Science Forum 740-742 (2013) 633-636. .

C. Wißgott, B. Kallinger, M. Rommel; Minority charge carrier lifetime for evaluating 4H-SiC epitaxial growth by Microwave detected Photoconductivity Decay; Materials Science Forum (2026).

This ePub file was created using machine-generated methods and automated software to convert the source text into an ePub format and may contain formatting inconsistencies from the original version. Formatting may vary depending on the device used.

The original version of this eBook is available on https://www.scientific.net/book/bulk-and-epitaxial-growth-of-sic/978-3-0364-3124-6

Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 71-77

doi: 10.4028/p-9UOfEY

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-09-27

Revised:
2025-12-10

Accepted:
2026-02-23

Online:
2026-05-18

Remote Epitaxy of SiC: Feasibility, Challenges, and Pathways

The original version of this paper is available on https://www.scientific.net/SSP.393.71.pdf

Misagh Ghezellou 1,a*, Justinas Palisaitis 1, b, and Jawad UI-Hassan 1,c

Department of Physics, Chemistry, and Biology (IFM), Linköping University, SE-58 183, Sweden

ªMisagh.Ghezellou@liu.se, bJustinas.Palisaitis@liu.se, cJawad.UI-Hassan@liu.se

Keywords: Remote Epitaxy, CVD, Graphene

Abstract

Silicon carbide (SiC) is a promising wide-bandgap semiconductor for advanced quantum technologies. Yet, despite progress in bulk and epitaxial growth, a reliable SiC-on-insulator platform remains lacking. Remote epitaxy, mediated by a 2D interlayer, offers a potential pathway to transferable SiC thin films and substrate reuse. In this work, we examine remote epitaxial growth of SiC on epitaxial graphene. We first evaluate the stability of graphene under SiC growth conditions and find that it degrades significantly at the required high temperatures, primarily due to hydrogen and silane etching. With the conditions yielding the highest-quality SiC epitaxial layer; graphene migrates above the SiC rather than remaining at the interface, demonstrating that true remote epitaxy is not achieved. These results highlight the fundamental challenges of SiC remote epitaxy on graphene and point toward critical directions for future exploration.

Introduction

The original version of this paper is available on https://www.scientific.net/SSP.393.71.pdf

Silicon carbide ( SiC ) is a wide band-gap semiconductor with exceptional properties, making it a key material for demanding applications in high-power electronics, optoelectronics, and quantum technologies. [1,2,3,4] In the quantum realm, SiC hosts optically addressable spin qubits, known as color centers, positioning it as a leading platform for integrated quantum photonics. [5, 6, 7] However, realizing this potential requires a scalable SiC-on-insulator platform. Traditional fabrication methods like mechanical polishing and etching struggle to produce the necessary ultra-thin layers at scale. A promising alternative is remote epitaxy, which uses a 2D intermediary layer to grow high-quality, transferable films, also allowing for the cost-saving reuse of expensive SiC substrates. [8, 9, 10]

The growth of an epitaxial film over a 2D intermediary can proceed through three distinct mechanisms. [11, 12, 13] In remote epitaxy, the substrate's electrostatic potential penetrates the 2D layer, guiding the formation of a single-crystalline film that copies the substrate's template. Conversely, quasi-van der Waals epitaxy relies on weak interactions with the 2D layer itself, where the substrate's potential is negligible. Finally, pinhole-based epitaxy occurs when defects in the 2D layer expose the underlying substrate, creating seeding points for direct growth and subsequent lateral overgrowth to form a continuous film. [9]

However, remote epitaxy of SiC faces a unique and critical challenge: polytype control. SiC exists in over 250 polytypes, and replicating a specific one during epitaxy requires step-flow growth on precisely off-cut substrates. [14] Consequently, the intermediary 2D layer must be compatible with this off-cut geometry. Graphene is an ideal candidate as it can be grown epitaxially on SiC . In contrast, materials like hBN, successful for III-V remote epitaxy, are unsuitable for SiC due to their polarity, which disrupts polytype replication. [15] This leads to a significant roadblock: while the epitaxial growth of graphene on SiC is a well-established process, it is typically optimized for on-axis substrates to achieve high uniformity. Research on producing high-quality epitaxial graphene on the required offaxis SiC substrates remains limited, hindering the advancement of SiC remote epitaxy. [16]

In this study, we address this central challenge by investigating the intricacies of SiC remote epitaxy. We explore the growth of epitaxial graphene on off-axis SiC substrates and develop process modifications to overcome the existing obstacles, thereby establishing a pathway for the subsequent remote epitaxial growth of SiC .

Table 1: Growth parameters of different samples grown under solely Ar ambient together with corresponding sample IDs.

Sample ID | Growth Temperature [°C] | SiH₄ flow [ml/min] | C/Si | Growth time [min]
A | 1660 | 11.5 | 1.2 | 10
B | 1660 | 3.5 | 1.2 | 10
C | 1590 | 5 | 1.2 | 1
D | 1590 | 5 | 1.2 | 10
E | 1590 | 5 | 1.2 | 30
F | 1540 | 5 | 1.2 | 30
G | 1590 | 5 | 1.6 | 30
H | 1590 | 5 | 2 | 30
I | 1610 | 2 | 2 | 30

Experimental

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All epitaxial layers in this study (graphene and SiC) were grown in a horizontal hot-wall chemical vapor deposition (CVD) reactor with induction heating. Standard highly doped n-type 4∘-off 4 H -SiC substrates ( Si - and C -face) were cut from the same commercial wafer and subjected to RCA cleaning prior to the growth. Carrier gases included Ar,H2, or their mixtures, with SiH4 and C3H8 serving as Si and C source gases, respectively. Unlike conventional graphite susceptor used for graphene growth, all epitaxial graphene layers were grown on a TaC-coated susceptor, identical to that used for SiC growth.

Graphene was synthesized by the sublimation method. Substrates underwent in-situ surface preparation at 1450∘C for 10 min in H2, followed by chamber evacuation and introduction of Ar at 200 mbar . The temperature was then raised to 1660∘C, and graphene growth proceeded for 30 min under Ar . To assess graphene preservation under SiC epitaxial growth condition, samples were subsequently exposed to H2,Ar+SiH4, and Ar+C3H8 ambient at various temperatures.

For SiC-on-graphene growth, Ar was selected as the carrier gas, and the temperature was varied between 1540∘C and 1660∘C. Growth runs were systematically performed with controlled parameter variations to examine their impact on SiC quality and graphene preservation. SiC deposition followed immediately after graphene growth by introducing source gases after pressure adjustment. Detailed parameters and sample IDs are provided in Table 1.

Surface morphology was examined by optical microscopy in differential interference contrast (DIC) mode. Raman spectroscopy was employed to verify graphene presence, assess its quality, and confirm SiC polytype replication. Transmission electron microscopy (TEM) was further used to confirm graphene retention and characterize the interfaces.

Results and Discussion

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On the Si-face, epitaxial graphene growth followed a layer-by-layer mode. Fig. 1(a,b) shows optical and Raman data from a 4∘-off Si-face substrate, with the Lorentzian fit of the 2D peak (FWHM =49 cm−1 ) confirming monolayer graphene above a buffer layer. [17, 18] Cross-sectional HRTEM (Fig. 1(c)) corroborates this structure.

The growth kinetics were examined by extending growth durations (Fig. 1(d)). Beyond 90 min, the 2D FWHM rapidly increased and saturated at ~80 cm−1, indicative of multilayer graphene. This saturation is likely influenced by the TaC-coated susceptor used for SiC growth, which contributes a positive Si partial pressure that suppresses further graphene sublimation.

In contrast, growth on the C-face produced highly non-uniform graphene coverage (Fig. 2). Optical and Raman analyses revealed bare regions without graphene (region A) and multilayer graphene

[picture]

Fig. 1: (a) Optical image showing the surface of a 4∘-off Si -face substrate after graphene growth. (b) Raman spectrum illustrating the 2D peak with Lorentzian fit, yielding a FWHM of 49 cm−1. (c) Cross-sectional HRTEM confirming the buffer layer and monolayer graphene. (d) Graph showing the evolution of the 2D peak FWHM with growth time on Si-face substrates.

Fig. 1. (a) Optical image showing the surface of a 4 ∘ -off Si -face substrate after graphene growth. (b) Raman spectrum illustrating the 2D peak with Lorentzian fit, yielding a FWHM of 49 c m − 1 . (c) Cross-sectional HRTEM confirming the buffer layer and monolayer graphene. (d) Graph showing the evolution of the 2D peak FWHM with growth time on Si-face substrates.

[picture]

Fig. 2: (a) Optical image showing epitaxial graphene grown on a C -face 4H−SiC substrate with randomly distributed graphene grains. (b) Raman spectra comparing two regions: one without graphene (A) and one with graphene (B).

Fig. 2. (a) Optical image showing epitaxial graphene grown on a C -face 4 H − S i C substrate with randomly distributed graphene grains. (b) Raman spectra comparing two regions: one without graphene (A) and one with graphene (B).

regions (region B,FWHM=53 cm−1 ). These observations agree with reports of turbostratic and uncontrolled graphene formation on the C-face, linked to its lower surface energy. [16]

The stability of epitaxial graphene under SiC growth conditions was tested in different ambient (Fig. 3). Graphene degraded in H2 above 1300∘C and was fully etched by introducing small flow of SiH4 in Ar ambient at 1590∘C, while repeating the experiment with C3H8 left graphene intact. These results establish SiH4 as the critical factor driving graphene loss during SiC growth.

SiC growth was next attempted on substrates with epitaxial graphene. At high precursor flow rates (samples A and B, Fig. 4(a,b)), parasitic graphitic deposits formed alongside preserved graphene in step-bunched regions. At reduced flow rates (Fig. 4(c,d)), deposits were suppressed but graphene was etched, indicating a delicate balance between precursor supply and graphene survival.

[picture]

Fig. 3: Optical images and Raman spectra showing graphene layers exposed to (a) H2 at 1300∘C, (b) Ar+SiH4 at 1590∘C, and (c) Ar+C3H8 at 1590∘C. Raman analysis indicates graphene removal in (a) and (b), while preservation is observed in (c).

Fig. 3. Optical images and Raman spectra showing graphene layers exposed to (a) H 2 at 1300 ∘ C , (b) A r + S i H 4 at 1590 ∘ C , and (c) A r + C 3 H 8 at 1590 ∘ C . Raman analysis indicates graphene removal in (a) and (b), while preservation is observed in (c).

[picture]

Fig. 4: (a) Optical image showing the surface of sample A, with inset providing higher magnification. (b) Raman spectra from two regions marked in (a). (c) Optical image of sample B. (d) Raman spectra from the region marked in (c).

Fig. 4. (a) Optical image showing the surface of sample A, with inset providing higher magnification. (b) Raman spectra from two regions marked in (a). (c) Optical image of sample B. (d) Raman spectra from the region marked in (c).

[picture]

Fig. 5: Optical images showing the surfaces of (a) sample C , (b) sample D , and (c) sample E after SiC growth for 1, 10, and 30 minutes, respectively. Surface pits linked to Si droplets are highlighted by yellow dashed circles.

Fig. 5. Optical images showing the surfaces of (a) sample C , (b) sample D , and (c) sample E after SiC growth for 1, 10, and 30 minutes, respectively. Surface pits linked to Si droplets are highlighted by yellow dashed circles.

Lowering the temperature to 1590∘C(C/Si=1.2) enabled SiC nucleation followed by epitaxial growth at a rate of ~1.3μ m/h, but Raman spectra showed no graphene peaks (Fig. 5). With increasing growth time, Si -droplet-related pits diminished and zigzag step structures characteristic of SiC emerged, yet graphene loss remained unavoidable.

To mitigate this, higher C/Si ratios ( 1.6 and 2.0) were explored (Fig. 6). Graphene-related peaks reappeared in Raman spectra, but surface quality degraded, with defective graphene or graphite features forming. Thus, higher C/Si ratios favor graphene preservation but compromise film morphology.

Optimized conditions were achieved in sample I, grown at 1610∘C,C/Si=2.0, and reduced SiH4 flow (2ml/min). No droplet pits were observed (Fig. 7(a)), triangular defects indicated SiC growth, and Raman spectra revealed 1−2 graphene monolayers (Fig. 7(b)). TEM confirmed 4H−SiC stacking (Fig. 7(c-f)). However, the graphene signal originated from the surface of the SiC film rather than the buried interface, ruling out true remote epitaxy.

[picture]

Fig. 6: (a, c) Optical images showing SiC grown on epitaxial graphene with different C/Si ratios: (a) sample G(C/Si=1.6) and (c) sample H(C/Si=2.0). (b, d) Raman spectra from the regions marked in (a) and (c), respectively.

Fig. 6. (a, c) Optical images showing SiC grown on epitaxial graphene with different C / S i ratios: (a) sample G ( C / S i = 1.6 ) and (c) sample H ( C / S i = 2.0 ) . (b, d) Raman spectra from the regions marked in (a) and (c), respectively.

[picture]

Fig. 7: (a) Optical image showing the surface of sample I with a triangular defect characteristic of SiC growth. (b) Raman spectrum indicating the presence of 1-2 graphene monolayers. (c) TEM image confirming the 4 H polytype of the epitaxial SiC layer. (d, e) TEM images showing step edges on the surface of sample I. (f) HRTEM image revealing a monolayer graphene above a buffer layer.

Fig. 7. (a) Optical image showing the surface of sample I with a triangular defect characteristic of SiC growth. (b) Raman spectrum indicating the presence of 1-2 graphene monolayers. (c) TEM image confirming the 4 H polytype of the epitaxial SiC layer. (d, e) TEM images showing step edges on the surface of sample I . (f) HRTEM image revealing a monolayer graphene above a buffer layer.

Two scenarios were considered: (i) graphene was etched during SiC growth and reformed upon cooling, or (ii) Si and C atoms penetrated beneath graphene to nucleate SiC, as reported for quasi2D GaN. [19] Additional experiments supported the first scenario. Suppressing graphene formation by raising chamber pressure after growth or introducing small H2 flows eliminated Raman graphene peaks, confirming that the observed graphene formed during cooldown rather than surviving growth.

Finally, the effect of H2 addition was examined. At very low H2/Ar(0.013), surfaces resembled step-bunched graphene (Fig. 8(a)), while higher H2/Ar(0.25) enabled SiC growth with smoother step edges (Fig. 8(b)). Yet in both cases, Raman showed no graphene, indicating that hydrogen promotes SiC growth but accelerates graphene loss.

[picture]

Fig. 8: Optical images showing sample surfaces after SiC growth with added H2 at H2/Ar ratios of (a) 0.013 and (b) 0.25 .

Fig. 8. Optical images showing sample surfaces after SiC growth with added H 2 at H 2 / A r ratios of (a) 0.013 and (b) 0.25 .

Summary

The original version of this paper is available on https://www.scientific.net/SSP.393.71.pdf

This study examined the feasibility of remote epitaxy of SiC using graphene as an intermediary layer. Preserving graphene during SiC growth proved highly challenging: it was consistently etched at high temperatures, low C/Si ratios, or in hydrogen- and silane-containing ambients. Even under conditions resulting in high quality SiC epitaxial layers, Raman and TEM analyses showed that graphene reformed only during cooldown, rather than surviving beneath the SiC epitaxial layer.

Overcoming these limitations will require lowering effective growth temperatures through improved precursor chemistry or ambient control, and exploring alternative substrate orientations that support island nucleation instead of step-flow growth. Addressing issues such as graphene-induced terrace widening, which promotes 3C-SiC nucleation, will also be critical.

Acknowledgments

The original version of this paper is available on https://www.scientific.net/SSP.393.71.pdf

The Swedish Research Council (VR) grant No.2020-05444 and European Union's Horizon Europe research and innovation program grant for the project SPINUS (Grant No. 101135699) are acknowledged for financial support. Swedish Research Council and the Swedish Foundation for Strategic Research are acknowledged for access to ARTEMI, the Swedish National Infrastructure in Advanced Electron Microscopy (2021-00171 and RIF21-0026).

References

The original version of this paper is available on https://www.scientific.net/SSP.393.71.pdf

T. Kimoto and Y. Yonezawa, "Current status and perspectives of ultrahigh-voltage sic power devices," Materials Science in Semiconductor Processing, vol. 78, pp. 43-56, 2018.

H. Tsuchida, I. Kamata, T. Miyazawa, M. Ito, X. Zhang, and M. Nagano, "Recent advances in 4h-sic epitaxy for high-voltage power devices," Materials Science in Semiconductor Processing, vol. 78, pp. 2-12, 2018.

F. La Via, D. Alquier, F. Giannazzo, T. Kimoto, P. Neudeck, H. Ou, A. Roncaglia, S. E. Saddow, and S. Tudisco, "Emerging sic applications beyond power electronic devices," Micromachines, vol. 14, no. 6, p. 1200, 2023.

M. Buffolo, D. Favero, A. Marcuzzi, C. De Santi, G. Meneghesso, E. Zanoni, and M. Meneghini, "Review and outlook on gan and sic power devices: industrial state-of-the-art, applications, and perspectives," IEEE Transactions on Electron Devices, 2024.

D. M. Lukin, M. A. Guidry, J. Yang, M. Ghezellou, S. Deb Mishra, H. Abe, T. Ohshima, J. UlHassan, and J. Vučković, "Two-emitter multimode cavity quantum electrodynamics in thin-film silicon carbide photonics," Physical Review X, vol. 13, no. 1, p. 011005, 2023.

D. J. Christle, A. L. Falk, P. Andrich, P. V. Klimov, J. U. Hassan, N. T. Son, E. Janzén, T. Ohshima, and D. D. Awschalom, "Isolated electron spins in silicon carbide with millisecond coherence times," Nature materials, vol. 14, no. 2, pp. 160-163, 2015.

T. Bosma, J. Hendriks, M. Ghezellou, N. T. Son, J. Ul-Hassan, and C. H. van der Wal, "Broadband single-mode planar waveguides in monolithic 4h-sic," Journal of Applied Physics, vol. 131, no. 2, p. 025703, 2022.

H. Kim, C. S. Chang, S. Lee, J. Jiang, J. Jeong, M. Park, Y. Meng, J. Ji, Y. Kwon, X. Sun et al., "Remote epitaxy," Nature Reviews Methods Primers, vol. 2, no. 1, p. 40, 2022.

C. S. Chang, K. S. Kim, B.-I. Park, J. Choi, H. Kim, J. Jeong, M. Barone, N. Parker, S. Lee, X. Zhang et al., "Remote epitaxial interaction through graphene," Science Advances, vol. 9, no. 42, p. eadj5379, 2023.

H.-J. S. Roland Rupp, Guenther Ruhl, "Semiconductor device and a method for forming a semiconductor device," U. S. Patent No. 20170018614A1, 25 Dec 2018.

Y. Kim, S. S. Cruz, K. Lee, B. O. Alawode, C. Choi, Y. Song, J. M. Johnson, C. Heidelberger, W. Kong, S. Choi et al., "Remote epitaxy through graphene enables two-dimensional materialbased layer transfer," Nature, vol. 544, no. 7650, pp. 340-343, 2017.

K. Chung, C.-H. Lee, and G.-C. Yi, "Transferable gan layers grown on zno-coated graphene layers for optoelectronic devices," Science, vol. 330, no. 6004, pp. 655-657, 2010.

S. Manzo, P. J. Strohbeen, Z. H. Lim, V. Saraswat, D. Du, S. Xu, N. Pokharel, L. J. Mawst, M. S. Arnold, and J. K. Kawasaki, "Pinhole-seeded lateral epitaxy and exfoliation of gasb films on graphene-terminated surfaces," Nature communications, vol. 13, no. 1, p. 4014, 2022.

T. Ueda, H. Nishino, and H. Matsunami, "Crystal growth of sic by step-controlled epitaxy," Journal of Crystal Growth, vol. 104, no. 3, pp. 695-700, 1990.

X. Wang, J. Choi, J. Yoo, and Y. J. Hong, "Unveiling the mechanism of remote epitaxy of crystalline semiconductors on 2d materials-coated substrates," Nano Convergence, vol. 10, no. 1, p. 40, Aug 2023.

G. R. Yazdi, T. Iakimov, and R. Yakimova, "Epitaxial graphene on sic: a review of growth and characterization," Crystals, vol. 6, no. 5, p. 53, 2016.

A. C. Ferrari, J. C. Meyer, V. Scardaci, C. Casiraghi, M. Lazzeri, F. Mauri, S. Piscanec, D. Jiang, K. S. Novoselov, S. Roth et al., "Raman spectrum of graphene and graphene layers," Physical review letters, vol. 97, no. 18, p. 187401, 2006.

R. Yakimova, C. Virojanadara, D. Gogova, M. Syväjärvi, D. Siche, K. Larsson, and L. I. Johansson, "Analysis of the formation conditions for large area epitaxial graphene on sic substrates," in Materials Science Forum, vol. 645. Trans Tech Publ, 2010, pp. 565-568.

Z. Y. Al Balushi, K. Wang, R. K. Ghosh, R. A. Vilá, S. M. Eichfeld, J. D. Caldwell, X. Qin, Y.C. Lin, P. A. DeSario, G. Stone et al., "Two-dimensional gallium nitride realized via graphene encapsulation," Nature materials, vol. 15, no. 11, pp. 1166-1171, 2016.

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The original version of this eBook is available on https://www.scientific.net/book/bulk-and-epitaxial-growth-of-sic/978-3-0364-3124-6

Solid State Phenomena, ISSN: 1662-9779, Vol. 393, pp 79-86

doi: 10.4028/p-fX8pPY

© 2026 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.

Submitted:
2025-09-28

Revised:
2026-02-02

Accepted:
2026-02-23

Online:
2026-05-18

Numerical Simulation of Optimal Source Temperature Distribution in PVT Method for SiC Single Crystals

The original version of this paper is available on https://www.scientific.net/SSP.393.79.pdf

Shota Tani a*, Masato Urakami b, Wataru Saito c, Shin-Ichi Nishizawa d

Kyushu University, Kasuga Koen 6-1, Kasuga, Fukuoka, Japan

a*tani.shota.587@s.kyushu-u.ac.jp, b  urakami_masato@riam.kyushu-u.ac.jp, c  wataru3.saito@riam.kyushu-u.ac.jp, d  s.nishizawa@riam.kyushu-u.ac.jp

Keywords: virtual reactor, numerical simulation, physical vapor transpor, recrystallization.

Abstract

In bulk SiC crystal growth using the PVT method, recrystallization within the source material leads to a decrease in growth rate and source utilization. In this study, numerical simulations were used to investigate the source temperature distribution and its effect on the growth rate and source utilization. Recrystallization in the upper and lower regions was considered separately. The results showed that reducing the source temperature gradient prevents recrystallization in the upper region, and a unidirectional gradient prevents recrystallization in the lower region, leading to higher growth rates and source utilization.

Introduction

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The Physical Vapor Transport (PVT) method is widely used for growing bulk SiC crystals. In this method, SiC powder is used as the source, and the sublimation and temperature distribution in the source directly affects the crystal quality and manufacturing cost of SiC . The evolution of SiC powder during crystal growth has been studied in previous work using in-situ X-ray techniques [1,2]. Generally, a moderate source temperature gradient enhances growth rate. However, when the temperature gradient is too high, a large amount of recrystallization occurs in the source [3, 4]. This problem reduces yield and growth rate, leading to high production costs. There have been many reports on studies of the SiC powder source in PVT growth [5,6,7,8]. However, few studies have focused on the optimization of source temperature distribution. This study uses numerical analysis with the STR software Virtual Reactor (VR) to examine the impact of recrystallization on growth rate and source utilization [9], and proposes an optimal source temperature distribution. In addition, the equilibrium vapor pressure dependent on temperature was used as a parameter to evaluate the source temperature distribution.

Optimal Source Temperature Distribution

The original version of this paper is available on https://www.scientific.net/SSP.393.79.pdf

Case 1: Conventional RF coil model.

The original version of this paper is available on https://www.scientific.net/SSP.393.79.pdf

In the PVT method, RF and resistance heating are employed as heating techniques for growing bulk SiC crystals. In Case1, the conventional RF coil model was used to examine the problem of recrystallization in the source. The modeling of the PVT furnace used is shown in Fig. 1. The model includes a graphite crucible, SiC powder, SiC seed, a seed holder, graphite felt insulation, and coils. Table 1 presents the physical properties of the materials used. A 4H polytype seed with a diameter of 120 mm was used. The growth was carried out under an Ar atmosphere at 1500 Pa , with the temperature controlled at 2250∘C at the center of the seed holder surface. The RF heating frequency was set to 10 kHz , and the heating power was calculated from the temperature and thermal properties of the structure. The growth time was set until the growth rate dropped below zero and the source was completely consumed, in order to calculate the source utilization. Growth steps were set at twohour intervals, and the total crystal growth was calculated from the obtained results. Initial particle size in the source was set to 500μ m with a porosity of 0.6 . Recrystallization is observed when the particle diameter exceeds this value. The utilization efficiency of the source was calculated as {[initial
source mass] - [residual source mass]} / [initial source mass]. The numerical modeling of the powder evolution is described in Reference [10].
In the high-temperature process of the PVT method, Lilov reported that the SiC reaction gas species are Si,Si2C, and SiC2. Below 2900 K,SiC2 is the dominant species controlling the growth rate [11]. Therefore, not only the temperature but also the equilibrium vapor pressure of SiC2 was considered for optimizing the source temperature distribution. The equilibrium vapor pressure values were calculated based on data traced from the graph published by Philippe Rocabois [12].

[picture]

Fig. 1. Casel model: Structure of the Conventional RF heating Furnace.

Fig. 1. Casel model: Structure of the Conventional RF heating Furnace.

Table 1. The physical parameters.

Components | Electric conductivity [S/m] | Thermal conductivity [W/(m×K)] | Density [kg/m³] | Heat capacity [J/(kg×K)] | Emissivity
SiC seed crystal | 1000 | 90 | 3220 | 920 | 0.9
SiC source Powder | 4 | 10 | 1600 | 920 | 0.8
Graphite Crucible | 1.6×10⁵ | 30 | 1840 | 1300 | 0.8
Graphite insulation side | 100 | 1.1 | 100 | 1000 | 0.8
Graphite insulation bottom | 200 | 1.4 | 180 | 1000 | 0.8

Fig. 2 shows the temperature distribution in the crucible and the particle size distribution after 24 hours of crystal growth. Fig. 3 shows the temperature and the corresponding equilibrium vapor pressure of SiC2 (Psic2) along the center axis ( 0 h ) [11]. The 24-hour average growth rate was 219 μm/h, with a total growth of 2.59 cm . From Fig. 2, it can be especially confirmed that recrystallization occurs in both the upper and lower regions of the source. It is also observed in the middle region. Recrystallization occurs when the sublimated gas becomes supersaturated in the source. Here, the transport direction and flux of the sublimated gas are determined by the value of the equilibrium vapor pressure gradient dP_SiC2/dy. Fig. 4 shows the equilibrium vapor pressure gradient, where negative values indicate gas flow toward the seed and positive values toward the bottom crucible. Differentiation was carried out using the finite difference method with Δ=2 mm. The source bottom is at y=15, and below the seed crystal is at y=165.

Recrystallization in the lower region occurs due to the temperature distribution created by RF coil heating, as the heat source is located at the crucible sidewall, leading to a gradual decrease in temperature toward the center. From Fig. 4, it can be seen that in the range of y=15−27, the vapor pressure gradient has positive values, causing gas transport toward the bottom crucible, resulting in supersaturation and recrystallization. Recrystallization in the upper region can be explained by the discontinuity of the equilibrium vapor pressure gradient at the source/gas interface. Fig. 4 shows that

[picture]

Fig. 2. Crucible temperature [ ∘C ] and particle size distribution [μm](24 h).

Fig. 2. Crucible temperature [ ∘ C ] and particle size distribution [ μ m ] ( 24 h ) .

[picture]

Fig. 3. Temperature [ ∘C ] and equilibrium vapor pressure of P−SiC2[ Pa] along the center axis (0h).

Fig. 3. Temperature [ ∘ C ] and equilibrium vapor pressure of P − S i C 2 [ P a ] along the center axis (0h).

at the source-gas interface (y=115), the vapor pressure gradient on the source side has a much larger negative value than that on the gas side. This gradient difference causes the sublimated gas to stagnate in the upper of the source, resulting in supersaturation and recrystallization. Similarly, recrystallization in the middle region occurs because, from y=27, the vapor pressure gradient in the lower region becomes more negative than that in the upper region. In contrast to the vapor pressure gradient, the temperature gradient increases gradually in the source. This finding indicates that vapor pressure distribution, rather than temperature distribution, is the key parameter in determining recrystallization.

These results suggest that recrystallization occurs when the vapor pressure gradient dP1SiC2/dy shifts from a large to a small negative value - in other words when the gradient of dP1SiC2/dy ( =d2P_SiC2/dy2 ) becomes positive causing stagnation of sublimated gas transport. Therefore, Fig. 5 presents d2P1SiC2/dy2 together with the SiC powder particle size growth rate [μm/h] at 0 h , indicating recrystallization in the source. This figure indicates that the particle size growth peaks at the sourcegas interface (y=115), where d2P−SiC2/dy2 reaches a maximum value of 0.032 at the gas-side interface. In Case 3, d2P_SiC2/dy2 at the source-gas interface was used as a parameter to study the effects of upper-region recrystallization on growth rate and source utilization. In Case 2, the lower temperature distribution was optimized.

[picture]

Fig. 4. Temperature gradient [∘C/cm] and equilibrium vapor pressure gradient dP_SiC2/dy [Pa/cm] along the center axis.

Fig. 4. Temperature gradient [ ∘ C / c m ] and equilibrium vapor pressure gradient dP_SiC2/dy [ P a / c m ] along the center axis.

[picture]

Fig. 5. Relationship between d2P_SiC2/dy2 and Particle radius growth rate [μm/h] along the center axis.

Fig. 5. Relationship between d 2 P _ S i C 2 / d y 2 and Particle radius growth rate [ μ m / h ] along the center axis.

Case 2: Optimaizing the temperature in the lower.

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In Case 2, the material at the bottom of the crucible was replaced with one with higher thermal conductivity to improve the temperature distribution in the lower part of the source. The analysis model and physical parameters are shown in Fig. 6 and Table 2. This material has fictitious properties to create an ideal temperature distribution. All other analysis conditions were the same as those used in Case 1. The 24-hour average growth rate was 217μ m/h, the total growth was 3.17 cm . Compared with Case 1, the total growth increased by 0.58 cm , while the growth rate decreased by 2μ m/h. Fig. 7 shows a unidirectional temperature gradient in the lower region of the source and no recrystallization, leading to improved source utilization.

[picture]

Fig. 6. Case 2 model: Change of bottom material.

Fig. 6. Case 2 model: Change of bottom material.

[picture]

Fig. 7. Optimization of the lower source temperature distribution [∘C] and particle size distribution [μm].
(24 h).

Fig. 7. Optimization of the lower source temperature distribution [ ∘ C ] and particle size distribution [ μ m ] . ( 24 h ) .

Table 2. The physical parameters.

Parameter | Value
Electric conductivity | 1.6 × 10⁵ S/m
Thermal conductivity | 500 W/(m * K)
Density | 2200 kg/m
Heat capacity | 1900 kg/m³
Emissivity | 0.8

The slight difference in growth rate is due to the lower maximum temperature in Case 2 than in Case 1, with the sublimated gas generated in the lower region consumed by recrystallization in the upper region. In practical induction heating, designing the lower temperature distribution shown in Fig. 7 is challenging. Therefore, it is important to lower the heat source and design the crucible so that the lower part is heated uniformly.

Case 3: Optimaizing the temperature in the upper.

The original version of this paper is available on https://www.scientific.net/SSP.393.79.pdf

In Case 3, we analyzed the influence of the d2P_SiC2/dy2 at the source-gas interface on growth rate and source utilization by setting the source temperature difference in the range of ΔT source =4~50∘C. The analysis model is shown in Fig. 8. This model differs from those used in Cases 1 and 2, with the temperature set at the boundary condition to realize an ideal temperature distribution, without using coils._The source sidewall was given a linear temperature boundary condition, and bottom was given a constant one. The crucible diameter was also reduced to 60 mm , and a flat temperature distribution was created by minimizing the lateral temperature gradient. Fig. 9 shows the 0 h temperature and the 24 h particle size distribution, while Table 3 lists the temperatures and d2P_SiC2/dy2 at the gas/source interface. As shown in Fig. 9,

[picture]

Fig. 8. Case3 model: The temperature was set at the boundary conditions for the ideal temperature distribution (no coils).

Fig. 8. Case3 model: The temperature was set at the boundary conditions for the ideal temperature distribution (no coils).

Table 3. Analysis Results of Case 3 model.

ΔT source
[°C]
Tseed
[°C]
T source
top [°C]
T source
bottom
[°C]
Total
Growth
[cm]
d²Psic2
dy²
|y=Gas/
Source
Growth
Rate
[μm/h]
Utilization
e efficiency
[%]

4 | 2370 | 2386 | 2390 | 2.49 | 0.010 | 164.4 | 91
10 | 2370 | 2386 | 2396 | 2.68 | 0.012 | 172.5 | 90
20 | 2370 | 2386 | 2406 | 2.79 | 0.017 | 173.7 | 83
30 | 2370 | 2386 | 2416 | 2.58 | 0.021 | 171.3 | 73
40 | 2370 | 2386 | 2426 | 2.23 | 0.027 | 165.8 | 44
50 | 2370 | 2386 | 2436 | 1.63 | 0.030 | 171.1 | 28

Growth Rate [μ𝐦/𝐡 is the 24-hour average growth rate.; Total growth [cm] was calculated by summing the average growth rates until the source was fully consumed.; The pressure for all models was 1200 Pa .

[picture]

Fig. 9. Temperature distribution [∘C] ( 0 h ) and particle size distribution [μm] ( 24 h ) for the Case 3 model. Δ𝐓=Δ𝐓 source: Temperature difference of the source along the center axis. 𝐗𝐚~𝐟 : d2P_SiC2/dy2 at the source-gas interface.

Fig. 9. Temperature distribution [ ∘ C ] ( 0 h ) and particle size distribution [ μ m ] ( 24 h ) for the Case 3 model. Δ 𝐓 = Δ 𝐓 source: Temperature difference of the source along the center axis. 𝐗 𝐚 ~ 𝐟 : d 2 P _ S i C 2 / d y 2 at the source-gas interface.

a larger d2P_SiC2/dy2 at the gas/source interface leads to greater particle size growth in the upper region. In addition, starting from ΔT=30∘C where d2P_SiC2/dy2=0.21, it can be observed that the peak position of particle size gradually shifts toward the middle region, indicating that the sublimated gas is consumed before reaching the upper region. At ΔT source =4∘C, no recrystallization was observed in the source, and Fig. 10 shows the corresponding d2P_SiC2/dy2 and the powder particle size growth rate [μm/h]. The source bottom is at y=2, and below the seed crystal is at y=127. These results also confirm that no recrystallization occurred throughout the entire source. Fig. 11 shows the relationship between the d2P_SiC2/dy2 at the source-gas interface and the utilization efficiency and growth rate ( 24 h average). The growth rate reached their maximum at d2P−SiC2/dy2=0.017(Δ T source =20∘C ), with values of 173μ m/h. Thereafter, the growth rate showed a decreasing trend, which coincided with the timing when recrystallization began to shift downward to the middle region. At d2P_SiC2/dy2=0.030(Δ T source =50∘C), the growth rate temporarily increased but did not reach its maximum, and the utilization efficiency decreased to 28%. From these results, it was shown that the growth rate and source utilization efficiency can be maximized by setting d2P_SiC2/dy2 at the source-gas interface. In practice, it is difficult to suppress the source temperature difference to 4∘C or 10∘C while maintaining a unidirectional source temperature distribution. Therefore, in thermal design for the PVT process, minimizing the source temperature difference is important. This allows the maximum source temperature to be reduced, which in turn helps lower power consumption and suppress the degradation of the crucible and insulation materials. If the growth rate needs to be increased, it is effective to maintain a low source temperature difference while either raising the overall temperature or enlarging the temperature difference in the gas region, which also helps reduce production costs. A more detailed analysis would require further examination of the computational model and its accuracy.

[picture]

Fig. 10. Relationship between d2P_SiC2/dy2 and Particle radius growth rate [μm/h] along the center axis. ( ΔT source =4∘C).

Fig. 10. Relationship between d 2 P _ S i C 2 / d y 2 and Particle radius growth rate [ μ m / h ] along the center axis. ( Δ T source = 4 ∘ C ) .

[picture]

Fig. 11. Relationship between d2P_SiC2/dy2 at the source-gas interface and the utilization efficiency and growth rate ( 24 h average).

Fig. 11. Relationship between d 2 P _ S i C 2 / d y 2 at the source-gas interface and the utilization efficiency and growth rate ( 24 h average).

Summary

The original version of this paper is available on https://www.scientific.net/SSP.393.79.pdf

The results revealed that the optimal temperature distribution suppresses recrystallization by minimizing and making the source temperature gradient unidirectional within the source. These improvements lead to higher growth rates and source utilization, which contribute to the reduction of wafer production costs.

References

The original version of this paper is available on https://www.scientific.net/SSP.393.79.pdf

P.J. Wellmann, M. Bickermann, D. Hofmann, L. Kadinski, M. Selder, T.L. Straubinger, A. Winnacker, In situ visualization and analysis of silicon carbide physical vapor transport growth using digital X-ray imaging, J. Cryst. Growth 216 (2000) 263-272.

Z.G. Herro, P.J. Wellmann, R. Püsche, M. Hundhausen, L. Ley, M. Maier, P. Masri, A. Winnacker, Investigation of mass transport during PVT growth of SiC by 13C labeling of source material, J. Cryst. Growth 258 (2003) 261-267.

X. Liu, B. Chen, L.X. Song, E.W. Shi, Z.Z. Chen, The behavior of powder sublimation in the long-term PVT growth of SiC crystals, J. Cryst. Growth 312 (2010) 1486-1490.

H. Li, X.L. Chen, D.Q. Ni, X. Wu, Factors affecting the graphitization behavior of the powder source during seeded sublimation growth of SiC bulk crystal, J. Cryst. Growth 258 (2003) 100105.

D.S. Karpov, O.V. Bord, S.Yu. Karpov, A.I. Zhmakin, M.S. Ramm, Yu.N. Makarov, Mass transport and powder source evolution in sublimation growth of SiC bulk crystals, Mater. Sci. Forum 353-356 (2001) 37-40.

X. Wang, D. Cai, H. Zhang, Increase of SiC sublimation growth rate by optimizing of powder packaging, J. Cryst. Growth 305 (2007) 122-132.

H. Miao, G. Mi, Y. Liu, Effect of powder packing method on thermal field of SiC crystal grown by PVT method, Ferroelectrics 618 (2024) 2610-2621.

C. Zhou, Z. Lu, C. Li, Y. Lu, H. Li, L. Dong, S. Ke, S.Y. Tong, Optimization of SiC single crystal growth via numerical simulation: Enhanced mass transport with graphite ring and block design, J. Cryst. Growth 668 (2025) 128283.

M.V. Bogdanov, A.O. Galyukov, S.Yu. Karpov, A.V. Kulik, S.K. Kochuguev, . Ofengeim, A.V. Tsiryulnikov, M.S. Ramm, A.I. Zhmakin, Yu.N. Makarov, Virtual reactor as a new tool for modeling and optimization of SiC bulk crystal growth, J. Cryst. Growth 225 (2001) 307-311. [9] theoretical analysis of the mass transport in powder charge.

A.V. Kulik, M.V. Bogdanov, S.Yu. Karpov, Y. Makarov, Theoretical analysis of the mass transport in the powder charge in long-term bulk SiC growth, Mater. Sci. Forum 457-460 (2004) 67-70.

S.K. Lilov, Study of the equilibrium processes in the gas phase during silicon carbide sublimation, Mater. Sci. Eng. B 21 (1993) 65-69.

P. Rocabois, C. Chatillon, C. Bernard, F. Genet, Thermodynamics of the Si-C system II. Mass spectrometric determination of the enthalpies of formation of molecules in the gaseous phase, High Temp. High Press. 27-28 (1996) 25-39.

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Keywords Index

#

12-inch 4h-sic Substrate 300 mm4H-SiC Crystal and Substrate Development

300 Mm 4 H -sic Crystal 300 mm4H-SiC Crystal and Substrate Development

4h-sic Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

A

Augmented Reality (ar) Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

B

Basal Plane Dislocation Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

Bpd Crowding Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

Bpd Pileup Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

Bulk Growth Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

Bumps Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

C

Chemical Vapor Deposition (cvd) Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

Close Space Pvt Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

Crystal Diameter Expansion 300 mm4H-SiC Crystal and Substrate Development

Cs-pvt Growth Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

Cvd Remote Epitaxy of SiC: Feasibility, Challenges, and Pathways

D

Defect Reduction Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

Defects Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

Doping Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

E

Edge Exclusion Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

Epitaxial Growth Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

G

Glow Discharge Mass Spectrometry (gdms) Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

Graphene Remote Epitaxy of SiC: Feasibility, Challenges, and Pathways

I

In-situ Observation Solution Growth Technique of Silicon Carbide with In Situ Observation

Induction Heating Solution Growth Technique of Silicon Carbide with In Situ Observation

Isotopically Enriched Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

M

Meniscus Solution Growth Technique of Silicon Carbide with In Situ Observation

N

Neutron Activation Analysis (naa) Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

Numerical Simulation Numerical Simulation of Optimal Source Temperature Distribution in PVT Method for SiC Single Crystals

O

Optical Applications Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

P

Physical Vapor Transpor Numerical Simulation of Optimal Source Temperature Distribution in PVT Method for SiC Single Crystals

Physical Vapor Transport (pvt) Growth Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

Pits Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

Polishing Of Epilayers Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

Polycrystalline 3c-sic Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

Precursors Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

Q

Quantum Technology Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

R

Radial Temperature Gradient 300 mm4H-SiC Crystal and Substrate Development

Recrystallization Numerical Simulation of Optimal Source Temperature Distribution in PVT Method for SiC Single Crystals

Remote Epitaxy Remote Epitaxy of SiC: Feasibility, Challenges, and Pathways

S

Secondary Ion Mass Spectrometry (sims) Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

Silicon Carbide (sic) Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

Silicon Carbide Epitaxy Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

Solution Growth Solution Growth Technique of Silicon Carbide with In Situ Observation

T

Tantalum Carbide Coating Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

Thermal Gradient Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

Thermal Stress 300 mm4H-SiC Crystal and Substrate Development

Thick Epitaxy Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor; Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

Trace Impurities Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

Transparent Wafers Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

U

Ultra Thick Epitaxy Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

Ultra-high Purity Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

V

Virtual Reactor Numerical Simulation of Optimal Source Temperature Distribution in PVT Method for SiC Single Crystals

Authors Index

A

Abe, Y. Solution Growth Technique of Silicon Carbide with In Situ Observation

Anzalone, R. Epitaxial Growth and Characterization of 4𝐇-SiC Layer on C-Face and Si-Face Substrates

Arneberg, N. Application of a Fine Grain 3C-SiC Powder Source Material during PVT Growth of 4H-SiC Crystals

C

Calabretta, C. Epitaxial Growth and Characterization of 4𝐇-SiC Layer on C-Face and Si-Face Substrates

Choi, J. Optimization of Seed Crystal Stability at the Initial Growth Stage Depending on Heating Ramp Rates and Gas Flow Channels of SiC Source Powder for Growth of 8-inch n-Type 4H-SiC Single Crystal

E

Erlekampf, J. Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

F

Feng, G. Development of High Concentration Uniformity Epitaxial Growth on 200 mm 4H−SiC Wafers

G

Gao, C. 300 mm4H-SiC Crystal and Substrate Development

Ghezellou, M. Remote Epitaxy of SiC: Feasibility, Challenges, and Pathways

Gobert, C. Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

Grazzi, C. Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine; Application of a Fine Grain 3C-SiC Powder Source Material during PVT Growth of 4H-SiC Crystals

Greulich-Weber, S. Application of a Fine Grain 3C-SiC Powder Source Material during PVT Growth of 4H-SiC Crystals

Guo, Y. 300 mm4H-SiC Crystal and Substrate Development

H

Hao, X. Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

Hu, H. Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

Huang, F. Development of High Concentration Uniformity Epitaxial Growth on 200 mm 4H−SiC Wafers

I

Ishibashi, H. Solution Growth Technique of Silicon Carbide with In Situ Observation

J

Jang, Y. Optimization of Seed Crystal Stability at the Initial Growth Stage Depending on Heating Ramp Rates and Gas Flow Channels of SiC Source Powder for Growth of 8-inch n-Type 4H-SiC Single Crystal

Johnson, S. Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

K

Kallinger, B. Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

Kang, J. Development of High Concentration Uniformity Epitaxial Growth on 200 mm 4H−SiC Wafers

Karhu, R. Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

Karim, T. Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

Kawabe, A. Solution Growth Technique of Silicon Carbide with In Situ Observation

Kim, J. Optimization of Seed Crystal Stability at the Initial Growth Stage Depending on Heating Ramp Rates and Gas Flow Channels of SiC Source Powder for Growth of 8-inch n-Type 4H-SiC Single Crystal

Kim, S. Optimization of Seed Crystal Stability at the Initial Growth Stage Depending on Heating Ramp Rates and Gas Flow Channels of SiC Source Powder for Growth of 8-inch n-Type 4H-SiC Single Crystal

Ku, K. Optimization of Seed Crystal Stability at the Initial Growth Stage Depending on Heating Ramp Rates and Gas Flow Channels of SiC Source Powder for Growth of 8-inch n-Type 4H-SiC Single Crystal

Kurashige, K. Solution Growth Technique of Silicon Carbide with In Situ Observation

Kyun, M. Optimization of Seed Crystal Stability at the Initial Growth Stage Depending on Heating Ramp Rates and Gas Flow Channels of SiC Source Powder for Growth of 8-inch n-Type 4H-SiC Single Crystal

Köhler, J. Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

L

Lee, C. Optimization of Seed Crystal Stability at the Initial Growth Stage Depending on Heating Ramp Rates and Gas Flow Channels of SiC Source Powder for Growth of 8-inch n-Type 4H-SiC Single Crystal

Lee, W. Optimization of Seed Crystal Stability at the Initial Growth Stage Depending on Heating Ramp Rates and Gas Flow Channels of SiC Source Powder for Growth of 8-inch n-Type 4H-SiC Single Crystal

Li, J. Development of High Concentration Uniformity Epitaxial Growth on 200 mm 4H−SiC Wafers

Li, Y. 300 mm4H-SiC Crystal and Substrate Development

M

Murphy, J. Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

N

Nakanishi, H. Solution Growth Technique of Silicon Carbide with In Situ Observation

Nania, C. Epitaxial Growth and Characterization of 4𝐇-SiC Layer on C-Face and Si-Face Substrates

Ning, X. 300 mm4H-SiC Crystal and Substrate Development

Nishizawa, S. Numerical Simulation of Optimal Source Temperature Distribution in PVT Method for SiC Single Crystals

O

Osada, J. Solution Growth Technique of Silicon Carbide with In Situ Observation

P

Palisaitis, J. Remote Epitaxy of SiC: Feasibility, Challenges, and Pathways

Pan, Y. 300 mm4H-SiC Crystal and Substrate Development

Peng, H. 300 mm4H-SiC Crystal and Substrate Development

Piluso, N. Epitaxial Growth and Characterization of 4𝐇-SiC Layer on C-Face and Si-Face Substrates

Q

Qian, W. Development of High Concentration Uniformity Epitaxial Growth on 200 mm 4H−SiC Wafers

R

Raciti, D. Epitaxial Growth and Characterization of 4𝐇-SiC Layer on C-Face and Si-Face Substrates

Rana, T. Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

Richter, J. Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

S

Saito, W. Numerical Simulation of Optimal Source Temperature Distribution in PVT Method for SiC Single Crystals

Sanchez, E. Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

Schaaff, F. Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

Schley, M. Ultra-Pure SiC Source Material for Optical SiC Crystal Growth

Schneider, O. Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

Severino, A. Epitaxial Growth and Characterization of 4𝐇-SiC Layer on C-Face and Si-Face Substrates

Shao, Y. Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

Shi, D. Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

Straub, T. Application of a Fine Grain 3C-SiC Powder Source Material during PVT Growth of 4H-SiC Crystals

Strüber, S. Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine; Application of a Fine Grain 3C-SiC Powder Source Material during PVT Growth of 4H-SiC Crystals

T

Tana, L. Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

Tani, S. Numerical Simulation of Optimal Source Temperature Distribution in PVT Method for SiC Single Crystals

Thierry-Jebali, N. Ultra-Thick (~200μ𝐦) Epitaxy on 150mm4H-SiC Wafers Using Single Wafer CVD Reactor

Titl, M. Growth and Characterization of "IsoPure" Epitaxial Layers for Quantum Applications

U

Ujihara, T. Solution Growth Technique of Silicon Carbide with In Situ Observation

Ul-Hassan, J. Remote Epitaxy of SiC: Feasibility, Challenges, and Pathways

Urakami, M. Numerical Simulation of Optimal Source Temperature Distribution in PVT Method for SiC Single Crystals

V

Vento, F. Epitaxial Growth and Characterization of 4𝐇-SiC Layer on C-Face and Si-Face Substrates

W

Wagner, T. Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

Wellmann, P. Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine; Application of a Fine Grain 3C-SiC Powder Source Material during PVT Growth of 4H-SiC Crystals

Wiedemann, J. Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

Wu, Y. Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

Wunder, P. Close Space PVT Growth of N- and P-Type Quasi-Bulk SiC in a Classic PVT Setup and a Newly Developed TableTopCS TM  Growth Machine

Z

Zhang, B. Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

Zhang, F. Growth of 8-Inch SiC Single Crystals with Low Basal Plane Dislocation Density

Zhao, J. Development of High Concentration Uniformity Epitaxial Growth on 200 mm 4H−SiC Wafers

Zhou, Y. 300 mm4H-SiC Crystal and Substrate Development

Zong, Y. 300 mm4H-SiC Crystal and Substrate Development

Zöcklein, J. Application of a Fine Grain 3C-SiC Powder Source Material during PVT Growth of 4H-SiC Crystals