Papers by Keyword: Carrier Lifetime

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Authors: Lin Cheng, Anant K. Agarwal, Craig Capell, Michael J. O'Loughlin, Khiem Lam, Jon Zhang, Jim Richmond, Al Burk, John W. Palmour, Aderinto Ogunniyi, Heather O’Brien, Charles Scozzie
Abstract: In this paper, we report our recently developed 1 cm2, 15 kV SiC p-GTO with an extremely low differential on-resistance (RON,diff) of 4.08 mΩ•cm2 at a high injection-current density (JAK) of 600 ~ 710 A/cm2. The 15 kV SiC p-GTO was built on a 120 μm, 2×1014/cm3 doped p-type SiC drift layer with a device active area of 0.521 cm2. Forward conduction of the 15 kV SiC p-GTO was characterized at 20°C and 200°C. Over this temperature range, the RON,diff at JAK of 600 ~ 710 A/cm2 decreased from 4.08 mΩ•cm2 at 20°C to 3.45 mΩ•cm2 at JAK of 600 ~ 680 A/cm2 at 200°C. The gate to cathode blocking voltage (VGK) was measured using a customized high-voltage test set-up. The leakage current at a VGK of 15 kV were measured 0.25 µA and 0.41 µA at 20°C and 200°C respectively.
Authors: Lin Cheng, Anant K. Agarwal, Michael J. O'Loughlin, Craig Capell, Khiem Lam, Charlotte Jonas, Jim Richmond, Al Burk, John W. Palmour, Aderinto Ogunniyi, Heather O’Brien, Charles Scozzie
Abstract: In this work, we report our recently developed 16 kV, 1 cm2, 4H-SiC PiN diode results. The SiC PiN diode was built on a 120 µm, 2×1014/cm3 doped n-type SiC drift layer with a device active area of 0.5175 cm2. Forward conduction of the PiN diode was characterized at temperatures from 20°C to 200°C. At high injection-current density (JF) of 350 ~ 400 A/cm2, the differential on-resistance (RON,diff) of the SiC PiN diode decreased from 6.08 mΩ·cm2 at 20°C to 5.12 mΩ·cm2 at 200°C, resulting in a very small average temperature coefficient of –5.33 µΩ·cm2/°C, while the forward voltage drop (VF) at 100 A/cm2 reduced from 4.77 V at 20°C to 4.17 V at 200°C. This is due to an increasing high-level carrier lifetime with an increase in temperature, resulting in reduced forward voltage drop. We also observed lower RON,diff at higher injection-current densities, suggesting that a higher carrier lifetime is needed in this lightly doped n-type SiC thick epi-layer in order to achieve full conductivity modulation. The anode to cathode reverse blocking leakage current was measured as 0.9 µA at 16 kV at room temperature.
Authors: Maria Luisa Polignano, Domenico Caputo, Giuseppe Pavia, F. Zanderigo
Authors: Nudjarin Ramungul, Yan Jun Zheng, R. Patel, V. Khemka, T. Paul Chow
Authors: Sei Hyung Ryu, Daniel J. Lichtenwalner, Michael O'Loughlin, Edward van Brunt, Craig Capell, Charlotte Jonas, Yemane Lemma, Jon Q. Zhang, Jim Richmond, Albert Burk, Brett Hull, Matthew McCain, Shadi Sabri, Heather O'Brien, Aderinto Ogunniyi, Aivars J. Lelis, Jeff Casady, Dave Grider, Scott Allen, John W. Palmour
Abstract: An investigation into the increased leakage currents and reduced blocking voltages associated with 1450°C lifetime enhancement oxidation for the 4H-SiC p-GTOs is presented. Roughening of the 4H-SiC surface due to localized crystallization of SiO2, or crystobalite formation, during the high temperature oxidation was identified as one of the main causes of this issue. A factor of 30 difference in permeability to O2 between amorphous SiO2 and crystobalite caused uneven oxidation, which resulted in significant roughness. This roughness, placed at the metallurgical junction between the gate and the drift layer, where the E-field is greatest, is believed to be responsible for the premature breakdown characteristics. A 2-step lifetime enhancement process, which moves this roughness to the lower E-field region of the device was introduced to alleviate this issue. A 15 kV 4H-SiC p-GTO with the 2-step lifetime enhancement process demonstrated a significant reduction in VF over the 1300°C oxidized devices, without any impact on blocking characteristics.
Authors: Gil Yong Chung, Mark J. Loboda, Mike F. MacMillan, Jian Wei Wan, Darren M. Hansen
Abstract: Excess carrier lifetimes in 4H SiC epitaxial wafers were characterized by microwave photoconductive decay (o/PCD). The measured decay compromised of surface and bulk recombination curves have fast and slow components. Measured lifetimes are not changed with various surface passivation techniques. High resolution lifetime maps show good correlation with stress birefringence images and lower lifetime around extended material defects like grainboundaries, defect clusters, edge defects and polytype switching bands. Chlorosilane based CVD epiwafers show higher bulk lifetime values than standard silane based CVD materials due to less bulk lifetime defect density.
Authors: Tetsuya Miyazawa, Takeshi Tawara, Hidekazu Tsuchida
Abstract: An epitaxial growth technique for 4H-SiC with B doping was developed to control the carrier lifetimes of the epilayers. A linear relationship was observed between the B doping concentration and the flow rate of tri-ethyl-boron, which was used as the B doping source. A room temperature photoluminescence spectrum of a N-and B-doped epilayer showed a broad B-related peak at 2.37 eV instead of a band-edge luminescence, which indicates that the carrier recombination path was changed by the B doping. The minority carrier lifetime decreased (< 30 ns at 250°C) with increasing B doping concentration. The thermal stability of the short carrier lifetime was compared with a conventional carrier lifetime reduction method, namely an electron irradiation technique. After thermal annealing at 1700°C, the carrier lifetime of the electron irradiated epilayer recovered while that of the B-doped epilayer remained, indicating that the carrier lifetime controlled by the B doping technique was more stable against the thermal processes.
Authors: Nudjarin Ramungul, V. Khemka, T. Paul Chow, Mario Ghezzo, James W. Kretchmer
Authors: Aurimas Uleckas, Eugenijus Gaubas, Joan Marc Rafi, Jiahe Chen, De Ren Yang, Hidenori Ohyama, Eddy Simoen, Jan Vanhellemont
Abstract: Results are presented of a comparative study of diodes processed on n-type Cz grown Si substrates without and with Ge doping concentration of about 1019 cm-3 and 1020 cm-3. In order to investigate thermal donor formation, isothermal annealing at 450°C for 0.5 – 5 h was carried out. As processed diodes were also irradiated with 2 MeV electrons with fluences in the range between 1014 and 1017 e/cm2 to investigate the Ge doping influence on irradiation induced defect formation. Diodes after thermal and radiation treatments have been investigated by combining different techniques.
Authors: Mitsuhiro Kushibe, Johji Nishio, Ryosuke Iijima, Akira Miyasaka, Hirokuni Asamizu, Hidenori Kitai, Ryoji Kosugi, Shinsuke Harada, Kazutoshi Kojima
Abstract: Carrier lifetime in low carrier concentration 4H-SiC epitaxial layers grown on the C-face was enhanced by using carbon implantation and post annealing. The measured carrier lifetime increased with the thickness of the epitaxial layer and was 11.4 µs for the 150 µm thick epitaxial layer. The internal carrier lifetime was estimated as 21 µs from the dependence of the measured carrier lifetime on the epitaxial layer thickness. This value is almost comparable to the reported values of the internal carrier lifetime for the layers grown on the Si-face.
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