Papers by Keyword: Power MOSFET

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Authors: Sei Hyung Ryu, Charlotte Jonas, Craig Capell, Yemane Lemma, Anant Agarwal, Ty McNutt, Dave Grider, Scott T. Allen, John W. Palmour
Abstract: For the first time, a 1200 V 4H-SiC power MOSFET with a monolithically integrated gate buffer circuit has been demonstrated successfully. The device used a 6x1015 cm-3 doped, 10 μm thick n-type drift layer to support 1200 V. The gate buffer circuit was built in a p-well, formed by boron ion implantation. The integrated device provided sufficient voltage isolation for the control circuit from the drain of the power MOSFET, and supported internal supply voltages up to 20 V. The operation of the integrated devices was demonstrated. A specific on-resistance (Ron,sp) of 20 mΩ-cm2 was observed. The high Ron,sp was due to the limitations in NMOS pull-up circuit topology and the body effect in the 4H-SiC NMOSFET. Development of PMOS pull-up devices is recommended for future integration efforts.
Authors: Kevin Matocha, Kiran Chatty, Sujit Banerjee, Larry B. Rowland
Abstract: We report a 1700V, 5.5mΩ-cm2 4H-SiC DMOSFET capable of 225°C operation. The specific on-resistance of the DMOSFET designed for 1200V applications is 8.8mΩ-cm2 at 225°C, an increase of only 60% compared to the room temperature value. The low specific on-resistance at high temperatures enables a smaller die size for high temperature operation. Under a negative gate bias temperature stress (BTS) at VGS=-15 V at 225°C for 20 minutes, the devices show a threshold voltage shift of ΔVTH=-0.25 V demonstrating one of the key device reliability requirements for high temperature operation.
Authors: Sei Hyung Ryu, Sumi Krishnaswami, Mrinal K. Das, Jim Richmond, Anant K. Agarwal, John W. Palmour, James D. Scofield
Abstract: Due to the high critical field in 4H-SiC, the drain charge and switching loss densities in a SiC power device are approximately 10X higher than that of a silicon device. However, for the same voltage and resistance ratings, the device area is much smaller for the 4H-SiC device. Therefore, the total drain charge and switching losses are much lower for the 4H-SiC power device. A 2.3 kV, 13.5 mW-cm2 4H-SiC power DMOSFET with a device area of 2.1 mm x 2.1 mm has been demonstrated. The device showed a stable avalanche at a drain bias of 2.3 kV, and an on-current of 5 A with a VGS of 20 V and a VDS of 2.6 V. Approximately an order of magnitude lower parasitic capacitance values, as compared to those of commercially available silicon power MOSFETs, were measured for the 4H-SiC power DMOSFET. This suggests that the 4H-SiC DMOSFET can provide an order of magnitude improvement in switching performance in high speed switching applications.
Authors: Dethard Peters, Adolf Schöner, Peter Friedrichs, Dietrich Stephani
Authors: Xiang Fen Wang, Gui Cui Fu, Cheng Gao, Jin Yong Yao
Abstract: A performance degradation assessment method is proposed based on probability statistic of common turn-on state of power MOSFET circuit in this paper. Threshold shift transient characteristics of MOSFET are studied and the performance degradation behavior of a bridge power MOSFET circuit is simulated. Threshold voltage degradation of a power MOSFET circuit caused by half bridge arm is observed and the probability of a period transient common turn-on state is calculated to evaluate the degree. The result can be used to evaluate the performance degradation trend and can also provide data support for predicting the degradation degree before circuit failed.
Authors: Ey Goo Kang
Abstract: Power MOSFET is develop in power savings, high efficiency, small size, high reliability, fast switching, low noise. Power MOSFET can be used high-speed switching transistors devices. Recently attention to the motor and the application of various technologies. Power MOSFET is devices the voltage-driven approach switching devices are design to handle on large power, power supplies, converters, motor controllers. In this paper, design the 400 V Planar type, and design the trench type for realization of low on-resistance. Trench Power MOSFET Vth : 3.25 V BV : 484 V Ron : 0.0395 Ohm has been optimized.
Authors: Sumi Krishnaswami, Sei Hyung Ryu, Bradley Heath, Anant K. Agarwal, John W. Palmour, Bruce Geil, Aivars J. Lelis, Charles Scozzie
Abstract: Gate oxide reliability measurements of 4H-SiC DMOSFETs were performed using the Time Dependent Dielectric Breakdown (TDDB) technique at 175°C. The oxide lifetime is then plotted as a function of the electric field. The results show the projected oxide lifetime to be > 100 years at an operating field of ~3 MV/cm. Device reliability of 2.0 kV DMOSFETs was studied by stressing the gate with a constant gate voltage of +15 V at a temperature of 175°C, and monitoring the forward I-V characteristics and threshold voltage for device stability. Our very first measurements show very little variation between the pre-stress and post-stress conditions up to 1000 hrs of operation at 175°C. In addition, forward on-current stressing of the MOSFETs show the devices to be stable up to 1000 hrs of operation.
Authors: Geun Ho Song, Wook Bahng, Nam Kyun Kim, Sang Cheol Kim, K.S. Seo, Eun Dong Kim
Authors: Sauvik Chowdhury, Collin W. Hitchcock, T. Paul Chow
Abstract: We present a comparative study of the electrical characteristics of different 1200V commercial SiC power MOSFETs at cryogenic temperatures down to 77 K. As compared to conventional silicon power MOSFETs, SiC MOSFETs show very different operating characteristics at low temperatures which is due to unique material and design parameters used in SiC MOSFETs. Of particular interest is a non-linear mixed triode/pentode-like I-V characteristic exhibited by all SiC MOSFETs at 77 K, which is demonstrated to be due to short channel effects in the constituent JFET.
Authors: Diane Perle Sadik, Jang Kwon Lim, Juan Colmenares, Mietek Bakowski, Hans Peter Nee
Abstract: The temperature evolution during a short-circuit in the die of three different Silicon Carbide1200-V power devices is presented. A transient thermal simulation was performed based on the reconstructedstructure of commercially available devices. The location of the hottest point in the device iscompared. Finally, the analysis supports the necessity to turn off short-circuit events rapidly in orderto protect the device after a fault.
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