Papers by Keyword: Silicon Carbide (SiC)

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Authors: Ming Liang Li, Hai Long Wang, Rui Zhang, Jing Li, Jun Hao Li
Abstract: SiC powders with nickel powders and sintering aids were prepared by pressureless sintering at 1500oC under a N2 atmosphere. XRD, TEM, SEM techniques were used to characterize the phases and microstructure of the specimens. The thermoelectric properties of SiC matrix composites were investigated by measuring the Seebeck coefficient and the electrical conductivity. The main phase of all samples was -SiC, the Ni2Si can be observed with adding nickel powders. The largest electric conductivity was close to 3.5 m-1-1 at about 973K. The highest Seeback coefficient was up to 1800 V/K at 1073K. The transition from n-type to p-type was occurred.
Authors: Chihiro Iwamoto, Shunichiro Tanaka
Abstract: In-situ HRTEM technique was applied to various substrates and the reaction processes between substrates and molten alloy were compared. Substrates used were SiC, Si3N4, Si wafers, an amorphous carbon film, and a carbon nanotube. Ti-containing Ag-Cu eutectic alloy foil was placed on the substrate and the combined specimen mounted on the heating holder of an HRTEM and heated in the microscope to melt the alloy foil. In the case of SiC, Si3N4, carbon materials, the molten alloy spreading on the substrates were observed after melting of the alloy. SiC polar plane nano-steps appeared with the SiC dissociation by the molten alloy. On the surface of the carbon nanotube, thin film precursor spreading was observed. In contrast, Si reaction with the molten alloy produced big holes at the contacted area and molten alloy spreading was not observed.
Authors: Jyotsna Dutta Majumdar
Abstract: Laser as a source of focused energy may be applied for the modification of microstructure and/or composition of the near surface region of a component. The technique may be applied for the development of a ceramic/intermetallics/interstitial compound dispersed metal matrix composite layer on the surface of metallic substrate by melting the substrate with a high power laser and simultaneous addition of alloy powders for the development of metal matrix composite layer by in-situ reactions. In the present contribution, development of metal-dispersed and intermetallic-dispersed matrix composite layer on the surface of metallic matrix has been discussed with a suitable example of its application.
Authors: Ki Jeong Han, B. Jayant Baliga, Woong Je Sung
Abstract: This paper presents a 1.2kV-rated 4H-SiC Split-Gate power MOSFET (SG-MOSFET) with superior high frequency figures-of-merit (HF-FOM). Electrical characteristics including reverse transfer capacitance and gate-to-drain charge are measured from fabricated devices on a 6-inch SiC wafer, demonstrating excellent performance. Compared to the conventional MOSFETs, the SG-MOSFET provides about 7x smaller HF-FOM [RonxCgd] and 2x smaller HF-FOM [RonxQgd] with improved reverse transfer capacitance and gate-to-drain charge.
Authors: A. Kozanecki, W. Jantsch, S. Lanzerstorfer, Brian J. Sealy, S. Jackson
Authors: R.T. Leonard, Y. Khlebnikov, Adrian R. Powell, C. Basceri, M.F. Brady, I. Khlebnikov, Jason R. Jenny, D.P. Malta, Michael J. Paisley, Valeri F. Tsvetkov, R. Zilli, E. Deyneka, H.McD. Hobgood, Vijay Balakrishna, Calvin H. Carter Jr.
Abstract: Recent advances in PVT c-axis growth process have shown a path for eliminating micropipes in 4HN-SiC, leading to the demonstration of zero micropipe density 100 mm 4HN-SiC wafers. Combined techniques of KOH etching and cross-polarizer inspections were used to confirm the absence of micropipes. Crystal growth studies for 3-inch material with similar processes have demonstrated a 1c screw dislocation median density of 175 cm-2, compared to typical densities of 2x103 to 4x103 cm-2 in current production wafers. These values were obtained through optical scanning analyzer methods and verified by x-ray topography.
Authors: Megan Snook, Harold Hearne, Ty McNutt, Victor Veliadis, Bettina Nechay, Sharon Woodruff, R.S. Howell, David Giorgi, Joseph White, Stuart Davis
Abstract: To meet the large current handling requirements of modern power conditioning systems, paralleling of a large number of devices is required. This increases cost and complexity through dicing, soldering, and forming multiple wire bonds. Furthermore, paralleling discrete devices increases package volume/weight and reduces power density. To overcome these complexities, PiN diodes were designed, fabricated at high yields, tested, and interconnected on a three-inch 4H-SiC wafer to form an 11.72 cm2 wafer-scale diode. The wafer-scale diode exhibited a breakdown voltage of 1790 V at an extremely low leakage current density of less than 0.002 mA/cm2. Under pulsed conditions, the peak current through the wafer-scale diode is 64.3 kA with a forward voltage drop of 10.3 V. The dissipated energy was 382 J and the action exceeded 1.7 MA2-sec.
Authors: Q. Jon Zhang, Charlotte Jonas, Joseph J. Sumakeris, Anant K. Agarwal, John W. Palmour
Abstract: DC characteristics of 4H-SiC p-channel IGBTs capable of blocking -12 kV and conducting -0.4 A (-100 A/cm2) at a forward voltage of -5.2 V at 25°C are demonstrated for the first time. A record low differential on-resistance of 14 mW×cm2 was achieved with a gate bias of -20 V indicating a strong conductivity modulation in the p-type drift region. A moderately doped current enhancement layer grown on the lightly doped drift layer effectively reduces the JFET resistance while maintains a high carrier lifetime for conductivity modulation. A hole MOS channel mobility of 12.5 cm2/V-s at -20 V of gate bias was measured with a MOS threshold voltage of -5.8 V. The blocking voltage of -12 kV was achieved by Junction Termination Extension (JTE).
Authors: Q. Jon Zhang, Anant K. Agarwal, Craig Capell, L. Cheng, Michael J. O'Loughlin, Albert A. Burk, John W. Palmour, Sergey L. Rumyantsev, T. Saxena, Michael E. Levinshtein, A. Ogunniyi, Heather O'Brien, Charles Scozzie
Abstract: In this paper, for the first time, we report 12 kV, 1 cm2 SiC GTOs demonstrated with a novel negative bevel termination, which improves the breakdown voltage by >3.5 kV compared to the conventional multiple-zone Junction Termination Extension (JTE). The significant improvement in the blocking voltage was attributed to the elimination of the electrical field crowding in the periphery of the mesa with conventional JTE termination. This new termination has been used in both electrically and optically triggered SiC GTOs. An ultrafast turn-on speed of 70 ns has been measured on 12 kV, 1 cm2 SiC light triggered GTOs.
Authors: Lin Cheng, Anant K. Agarwal, Craig Capell, Michael J. O'Loughlin, Khiem Lam, Jon Zhang, Jim Richmond, Al Burk, John W. Palmour, Aderinto Ogunniyi, Heather O’Brien, Charles Scozzie
Abstract: In this paper, we report our recently developed 1 cm2, 15 kV SiC p-GTO with an extremely low differential on-resistance (RON,diff) of 4.08 mΩ•cm2 at a high injection-current density (JAK) of 600 ~ 710 A/cm2. The 15 kV SiC p-GTO was built on a 120 μm, 2×1014/cm3 doped p-type SiC drift layer with a device active area of 0.521 cm2. Forward conduction of the 15 kV SiC p-GTO was characterized at 20°C and 200°C. Over this temperature range, the RON,diff at JAK of 600 ~ 710 A/cm2 decreased from 4.08 mΩ•cm2 at 20°C to 3.45 mΩ•cm2 at JAK of 600 ~ 680 A/cm2 at 200°C. The gate to cathode blocking voltage (VGK) was measured using a customized high-voltage test set-up. The leakage current at a VGK of 15 kV were measured 0.25 µA and 0.41 µA at 20°C and 200°C respectively.
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