Papers by Keyword: Silicon-on-Insulator (SOI)

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Authors: B. Mardiana, Hanim Abdul Razak, H. Hazura, S. Shaari, P. Susthitha Menon, Huda Abdullah, N. Arsad
Abstract: In near future, silicon-on-insulator (SOI) microring resonator are expected to be basic components for wavelength filtering and switching due to their compact size and wide free spectral range (FSR). In this paper, a 2X2 optical switch by using active microring resonator is proposed. The switch is consists of second order serially cascaded microring coupled to a pair of waveguide. The ON/OFF state of the design is control by electric signal which will vary the refractive index. The device is design to operate at 1.55µm wavelength. With a 500nm x 200nm rib dimensions, the design is proven to have single mode behaviour. Finite-Difference Time-Domain (FDTD) method simulation by RSOFT software is use to characterize the device performance. The results show that the 2X2 optical switch proposed can be an efficient device to be functioning in WDM application.
Authors: Liang Gao, Guo Hui Yuan, Xing Li Liu, Yu Ren Chen
Abstract: We design a double slots based on micro-ring resonator on silicon-on-insulator (SOI). An asymmetric structure is considered for the ring waveguide in order to improve the sensor's bending efficiency. Finite-difference time-domain (FDTD) method is used to analyze and optimize this sensor. The optimized size of the sensor is below 25×15μm2. Numerical analysis shows that when the radius of the micro-ring is about 5μm, the sensitivity reaches a value of 708nm/RIU, which is ten times of that of the conventional micro-ring sensor. Quality factor (Q factor) of 580 and free spectral range (FSR) of 33nm are also obtained. Our analysis also shows that the sensor has good sensing characteristics to different organic solutions.
Authors: Xiao Ming Yang, Yu Cai, Tian Qian Li
Abstract: A slope SOI-LDMOS power device is proposed for high-voltage. When a positive bais is applied to the drain electrode, holes are induced and astricted by the slope buried oxide layer. So a high density positive charge layer is formed on the buried oxide layer. The electrical field in the buried oxide is improved as well as vertical breakdown voltage by the layer. Because the thickness of the drift region linearly increases from the source to the drain, the surface electric field is optimized, resulting in increase of lateral breakdown voltage. In this paper, the electric characteristics of the new device are simulated by Medici softerware. The result is shown that above 600 V breakdown voltage is obtained at 1μm thick buried oxide layer. The breakdown voltage is higher by three times than that of conventional SOI LDMOS.
Authors: Hiroya Ikeda, Faiz Salleh
Abstract: We propose a novel single-electron refrigerator (SER) which can be fabricated in silicon-on-insulator wafers. The SER has a structure of single-electron box combined with single-electron pump (SEP). An equivalent circuit of the SEP-refrigerator is represented and its stability diagram (Coulomb diamond) is theoretically calculated. It is found that the stability diagram has a honeycomb structure. Moreover, the operation of the single-electron transfer and single-electron storage is numerically demonstrated using a Monte Carlo simulation based on the orthodox theory of the Coulomb blockade phenomenon.
Authors: B. Mardiana, A.R. Hanim, H. Hazura, S. Shaari, P. Susthitha Menon, Huda Abdullah
Abstract: This paper highlights the study of the free carrier injection effect on the active SOI optical ring resonator. The effect of the free carrier injection on optical ring resonator was evaluated by varying the p+ and n+ doping concentrations. The device performances are predicted by using numerical modelling software of the 2D SILVACO and Finite Difference Time Domain method simulation software RSOFT. The results show the refractive index change increases as the p+ and n+ doping concentrations is getting higher. A shift in resonant wavelength of around 2 nm was predicted at 5x1019 cm3 p+ and n+ doping concentrations with 5.8x10-3 refractive index change. It is also shown that 8.2dB change of the output response obtained through the output.
Authors: O.V. Naumova, B. Fomin, V.P. Popov, Victor Strelchuk, A. Nikolenko, A.N. Nazarov
Abstract: Properties of Si/buried oxide (BOX) systems with bonded interface in silicon-on-insulator (SOI) wafers were studied in this paper. Results show impact of the starting Si material - Czochralski (Cz) or float-zone (Fz) grown silicon on the electron mobility (μe) and BOX charge behavior in ultrathin SOI layers. In particular, there were found: 1) the μe ~ Ne-0.3 dependencies at the electron density Ne in the range of 4х (1011-1012) cm-2 in accumulation Cz-SOI layers with the μe degradation when Si thickness decreases from 20 to 9 nm, and 2) the ~ Ne-0.6 behavior of mobility with no degradation in Fz-SOI layers. Raman spectroscopy shows the structural modification of Cz-SOI layers. An origin of degradation of the electrical and structural properties for ultrathin SOI layer is discussed.
Authors: Abdul Razak Hanim, Haroon Hazura, Bidin Mardiana, Shaari Sahbudin, P. Susthitha Menon
Abstract: The analyses of the simulation of a single mode buried waveguide optical phase modulator based on SOI material are here reported. The structure has been simulated by Athena from Silvaco simulation package. The buried waveguide is created by doping phosphorus with concentration of 10e15 cm-3 into the substrate. The real refractive index and the absorption coefficient of the waveguide are changed using the free carrier dispersion effect via carrier injection of a pn junction. The efficiency, VπLπ is calculated and the performance is compared with that of the rib waveguide optical phase modulator of the same material and dimensions. Simulation shows that the device can be an efficient device for application in intensity modulation.
Authors: Andre Stesmans
Authors: Ida E. Tyschenko, A.A. Frantsuzov, O.V. Naumova, B.I. Fomin, D.V. Nikolaev, V.P. Popov
Abstract: Electro-physical properties of metal-oxide-silicon (MOS) structures and MOS transistors, prepared in the top silicon layer of silicon-on-insulator (SOI) structures containing Ge nanocrystals in the buried SiO2 layers, have been studied. It was obtained that carrier accumulation in MOS structures depend on the direction of built-in electrical field in MOS structures. Accumulation of the excess negative charges in the case of p-channel transistors is associated with electron trapping on Ge nanocrystals synthesized in the buried dielectric. In the case of n-channel transistor, positive charge related to the Si/SiO2 interface or to the charged oxide is accumulated. The Ge atoms diffused to the SiO2/Si interface can stimulate the formation of the excess positive charge.
Authors: Jun Bin Zang, Chen Yang Xue, Li Ping Wei, Yong Hua Wang, Dan Feng Cui, Wen Dong Zhang
Abstract: With the extensive research and application of SOI nano-optical ring resonators, the problem of high integration becomes the bottleneck restricting its development. To research the effect of deposited SiO2 insulating layer on the resonance characteristic of SOI nano-waveguid ring cavity while integrating, a rib waveguide ring resonator with 500nm SiO2 insulating layer deposited was designed and fabricated in this paper. By testing the resonance transmission spectrum power of this structure, it is found that SiO2 insulating layer deposited has no effect on the grating vertical coupling efficiency while improves the quality factor to 14.000±1.000.
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