Design of Data Acquisition and Storage Circuit Based on Linear Array CCD

Jian Hong Zhu; Shao Peng Yang; Mei Feng Gao

doi:10.4028/www.scientific.net/AMM.556-562.1652

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 556-562Design of Data Acquisition and Storage Circuit...

Design of Data Acquisition and Storage Circuit Based on Linear Array CCD

Abstract:

In order to ensure the linear array CCD normally and stably working in the spectral measurement, the data acquisition and storage circuit is presented. On the basis of analyzing the ILX511 driving timing, the circuit of data acquisition, processing, and storage based on CCD was designed. The CPLD was used to establish the correct sequence for the CCD clock pulse, AD converter clock, and FIFO writing signal, so the data acquisition, converter, and storage synchronously are achieved. The experiments show that the designed circuit is feasible.

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Periodical:

Applied Mechanics and Materials (Volumes 556-562)

Pages:

1652-1655

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.556-562.1652

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Online since:

May 2014

Authors:

Jian Hong Zhu*, Shao Peng Yang, Mei Feng Gao

Keywords:

CCD Driving Timing, CPLD, Data Acquisition, Data Storage, Linear Array CCD

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* - Corresponding Author

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