Papers by Author: Anabela Veloso

Abstract: The industry has diverged into two main approaches for high-k and metal gate (HKMG) integration. One is the so called gate-first. The other is gate-last, also called replacement metal gate (RMG) where the gate electrode is deposited after junctions formation and the high-k gate dielectric is deposited in the beginning of the flow (high-k first-RMG) or just prior to gate electrode deposition (high-k last-RMG) [1-. We can distinguish two RMG process flows called either high-k first or high-k last. In RMG high-k first, poly silicon is removed on top of a TiN etch stop layer whereas on high-k last poly silicon is removed on top of a dummy oxide layer. This dummy oxide has also to be removed in order to redeposit a novel high-k and work function metal (Figure 1).

Abstract: We report in this work some process optimization effort in performing poly silicon removal for replacement gate process integration. Successful wet poly silicon removal after dummy gate patterning is not only conditioned by suitable process conditions during wet removal but is also impacted by process steps prior to gate removal A thorough evaluation of the impact on poly removal from dopants or contaminants introduced in the poly silicon by previous processing is done, resulting in an optimized integration flow with successful poly removal. This work also shows that use of diluted TMAH chemistry instead of diluted ammonia in performing poly silicon removal provides better ability in removing poly silicon especially in narrow gate structures.