Papers by Author: Atsushi Tanaka

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Abstract: We investigated the effect of the basal plane dislocation (BPD) density in 4H-silicon carbide (SiC) substrates on the forward voltage (Vsd) degradation of body-diodes. Using reflection X-ray topography, the BPD density was automatically estimated from the substrates prior to fabrication of metal–oxide–semiconductor field-effect transistors (MOSFETs). A strong positive correlation was found between the Vsd shift, which was calculated from the difference before and after forward bias stress at 160 A/cm2 for ~500 hours, and the BPD density of the substrate. We show that it is possible to predict Vsd shifts from the BPD densities of SiC substrates prior to the fabrication of MOSFETs. In addition, we examined the origin of stacking faults (SFs) as a result of the application of forward bias stress. We presume that SFs are formed by BPDs converted to threading edge dislocations at the epi/sub interface, as well as by BPDs penetrating into the epitaxial layer.
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Abstract: SiC power module with low loss and high reliability was developed by utilizing IEMOSFET and SBD. The IEMOSFET is the SiC MOSFET with high channel mobility in which the channel region is the p-type carbon-face epitaxial layer with low acceptor concentration. Elemental technologies for the high channel mobility and the high reliability of the gate oxide have been developed to realize the excellent characteristics by the IEMOSFET. The SBD was designed so as to minimize the forward voltage drops and the reverse leakage current. For the fabrication of these SiC power devices, the mass production technology such as gate oxidation, ion implantation and following activation annealing have been also developed.
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