Papers by Author: Jacob Lawson

Abstract: Three dimensional models of both single-chip and multiple-chip power sub-modules were generated using ANSYS in order to simulate the effects of various substrate materials, heat fluxes, heat transfer coefficients, and device placement configurations on temperature and thermal stress contours. Alumina, aluminum-nitride, and CVD diamond were compared as substrates. Heat fluxes of 100 to 500 watts/cm2 resulted in SiC device junction temperatures in the range of 350 to 650 K. The predicted maximum operating temperature for a chip, to which 300 watts/cm2 of heat flux was applied, would be 239°C (512 K). In the applied heat flux range, the minimum and maximum Von Mises stress of a simulated single SiC device sub-module was between 1.2 MPa to 2.4 GPa. The maximum shear stress at 300 watts/cm2 was predicted to be 243 MPa. Both the maximum and minimum chip temperature decreased with increasing heat transfer coefficient from 25 to 2500 watts/m2 K. With modest cooling, represented by a heat transfer coefficient (hconv) of 250 watts/m2 K, SiC chips operated at 300 watts/cm2 power density maintained junction temperatures Tj < 400 K. If consistent with simulation results, CVD diamond integrated substrates should be superior to those comprised of AlN or Al2O3. Asymmetric device placement in the multi-chip module proved more effective at avoiding potential hot spots than the symmetric configuration.

Abstract: AlNi and Ni2Si based ohmic contacts to p-type 4H-SiC have been produced using low energy ion implantation, a Ti contact layer, and sequential anneals. Low resistivities were promoted by degenerately (>1020 cm-3) doping the surface region of 4H-SiC epilayers via Al+ implantation. High acceptor activation and improved surface morphology was achieved by capping the samples with pyrolized photoresist and using a two-step anneal sequence in argon. Ti/AlNi/W and Ti/Ni2Si/W stacks of varying Ti and/or binary layer thickness were compared at varying anneal temperatures. AlNi based samples reliably and repeatedly achieved specific contact resistivities as low as 5.5 x10-5 ohm-cm2 after annealing at temperatures of 700-1000°C. For the Ni2Si samples, resistivities as low 4.5x10-4 ohm-cm2 were reached after annealing between 750 and 1100°C. Similarly, a set of Ti/AlNi/Au samples, with or without Ge as an additional contact layer, were prepared via the same procedures. In this case, specific contact resistivities as low as 5.0 x10-4 ohm-cm2 were achieved after annealing the Ti/AlNi/Au samples between 600 and 700°C for 30 minutes in a dynamic argon atmosphere or under high vacuum. The lowest resistivities were realized using thicker (~ 40 nm) Ti layers. I-V analysis revealed superior linear characteristics for the AlNi system, which also exhibited a more stable microstructure after anneal. SIMS and RBS were used to analyze the stability of the stacks subsequent to thermal treatment. AFM analysis demonstrated the superiority of photoresist capping over alternatives in minimizing surface roughness. Linear ohmic behavior after significantly reduced anneal temperature is the main observation of the present study.