Papers by Author: Jean Lorenzzi

Abstract: We report on n-type 3C-SiC samples grown by sublimation epitaxy. We focus on the low temperature photoluminescence intensity and show that the presence of a first conversion layer, grown at low temperature, is not only beneficial to improve the homogeneity of the polytype conversion but, also, to the LTPL signal intensity. From the use of a simple model, we show that this comes from a reduced density of non-radiative recombination centers.

Abstract: In this work we report on the growth and preparation of 3C-SiC(111) material for metal-oxide-semiconductor (MOS) application. In order to achieve reasonable material quality to prepare MOS capacitors several and crucial steps are needed: 1) heteroepitaxial growth of high quality 3C-SiC(111) layer by vapour-liquid-solid mechanism on 6H-SiC(0001) substrate, 2) surface polishing, 3) homoepitaxial re-growth by chemical vapour deposition and 4) use of an advanced oxidation process combining plasma enhanced chemical vapour deposition (PECVD) SiO2 and short post-oxidation steps in wet oxygen. Combining all these processes the interface traps density (Dit)can be drastically decreased down to 1.2  1010 eV-1cm-2 at 0.63 eV below the conduction band. To our knowledge, these values are the best ever reported for SiC material in general and 3C-SiC in particular.

Abstract: Defects in cubic silicon carbide (3C-SiC) epilayers, that were grown using different techniques and on different substrates, were studied in terms of electrical activity and device limiting implications. An electrical characterization by conductive atomic force microscopy (C-AFM) showed that stacking faults (SFs) are normally the predominant type of defects that are electrically active at the semiconductor surface and, therefore, the most important defects that can affect the contact properties on these epilayers. It is also shown that an ultraviolet (UV) irradiation process can be used to suppress detrimental leakage currents passing through SFs that are carbon terminated at the semiconductor surface. Indeed, current-voltage characterization of Au/3C-SiC diodes showed a subsequent improvement of the Schottky behavior.

Abstract: The current communication focuses on the influence of a post-growth annealing on the evolution of defects inside (111) 3C-SiC layers grown by the Vapour Liquid Solid (VLS) mechanism in SiGe melts on Si-face on- and off axis 6H-SiC substrates. The layers are studied by Transmission Electron Microscopy (TEM) and Low Temperature Photoluminescence (LTPL). It was found that the growth on off-axis substrates results in a 3C-SiC layer containing mainly stacking faults (SFs) and microtwins (MT). The density of MT lamellae and SFs reduces in the layers grown on the on-axis substrate compared to off-axis substrate. In the layers grown on off-axis substrates the annealing strongly reduces the density of SFs inclined to the 3C/6H-SiC interface. Additionally, 3C to 6H polytypic transformation appears only at the interface, most probably starting from substrate step edges. This was only seen on off-axis seed since the step edges are more.

Abstract: The current communication focuses on the investigation of 3C-SiC layers grown by the Vapour-Liquid-Solid mechanism on on-axis Si-face 6H-SiC substrates in SiSn melts with different compositions and at different growth temperatures. The layers are studied by Transmission Electron Microscopy and Low Temperature Photoluminescence. It was found that for melts with Sn concentration higher than 60 at% large Sn-related precipitates are formed. The depth distribution of the Sn precipitates strongly depends not only on the melt composition but also on the growth temperature. Their formation strongly influences the stacking fault density and the dopant incorporation in the layers. Lower Sn concentrations combined with higher growth temperatures should result in 3C-SiC layer with enhanced structural quality.

Abstract: Free carrier absorption (FCA) and picosecond light-induced transient grating (LITG) techniques were applied to study the photoelectrical properties of 3C-SiC(111) homoepitaxial layers grown by CVD method on VLS (vapour-liquid-solid) grown seeds. The thickness of the CVD layers was ~10.5 µm with non-intentional type doping of n (~ 1017 cm-3) or p (<1015 cm-3). The carrier lifetime and the diffusion coefficient were measured as the function of the sample temperature, the injected excess carrier density at different growth parameters. At room temperature the ambipolar diffusion coefficient was Da=2.5-3 cm2/s, while the lifetime was in the range of 12-18 ns. The best structural and electrical properties were obtained for a CVD layer grown at high, 1600 °C temperature.

Abstract: In this work we report on 3C-SiC heteroepitaxial growth on 4H-SiC(0001) substrates which were patterned to form mesa structures. Two different deposition techniques were used and compared: vapour-liquid-solid (VLS) mechanism and chemical vapour deposition (CVD). The results in terms of surface morphology evolution and the polytype formation using these growth techniques were studied and compared. It was observed both 4H lateral growth from the mesa sidewalls and 3C enlargement on top of the mesas, the former being faster with CVD and VLS. Only VLS technique allowed elimination of twin boundaries for proper orientation of the mesa sidewalls.

Abstract: This paper deals with the formation and propagation of twin boundaries (TBs) inside 3C-SiC layers grown heteroepitaxially on -SiC substrate. The equivalent probability of nucleating 60° rotated 3C islands on such substrate lead to the systematic formation of TB upon coalescence of these islands. Elimination of these defects should occur by bending of the propagation direction. Bending through incoherent TBs is usually encountered during both VLS and CVD growth and it generates crystalline defects due to high built-in energy. One would prefer coherent TBs, formed by two-by-two annihilation of neighbouring TBs, which do not form new defect except microtwin inclusion at the interface. Such TB annihilation seems to be a specificity of growth by VLS mechanism. The mechanism of such bending is discussed

Abstract: This paper reports on the electrical characteristics of thermally grown SiO2 on cubic silicon carbide (3C-SiC). The 3C-SiC (111) was grown on Si-face 6H-SiC (0001) on-axis substrates by a non-conventional Vapor-Liquid-Solid (VLS) technique. Scanning probe microscopy techniques, including Atomic Force Microscopy (AFM), Scanning Capacitance Microscopy (SCM) and tunneling AFM (TUNA) were employed to study the morphology, local capacitance and local current variations across the sample surface. This nanoscale investigation allowed monitoring the homogeneity, as well as reliability in terms of dielectric breakdown (BD), of the thermally grown SiO2. In this way it was possible to gain insights into the breakdown related to pre-existing defects (extrinsic breakdown) as well as the actual intrinsic breakdown of the dielectric.

Abstract: Thin 3C-SiC(111) epilayers grown on 6H-SiC(0001) substrate by VLS and CVD procedures were studied by low temperature photoluminescence (LTPL) and nonlinear optical techniques at room and low temperatures. Free carrier density ((0.3-7)×1017 cm-3) and nitrogen concentration (4×1016 cm-3) in the layers were determined from Raman and LTPL data. Investigation of non-equilibrium carrier dynamics by using transient grating and free carrier absorption techniques provided an ambipolar diffusion coefficient Da (~2.5 cm2/s) and carrier lifetime τR (2-4 ns) values at room temperature. The temperature dependences of Da and τR in 40-300 K range revealed the scattering processes in high density plasma as well the impact of defects.