Papers by Author: Kazukuni Hara

Abstract: In this work, we have developed a selective embedded epitaxial growth process on 150-mm-diameter wafer by vertical type hot wall CVD reactor with the aim to realize the all-epitaxial 4H-SiC MOSFETs [1, 2, 3, 4, 5]. We found that at elevated temperature and adding HCl, the epitaxial growth rate at the bottom of trench is greatly enhanced compare to growth on the mesa top. And we obtain high growth rate 7.6μm/h at trench bottom on 150mm-diameter-wafer uniformly with high speed rotation (1000rpm).

Abstract: We have developed a single-wafer vertical epitaxial reactor which realizes high-throughput production of 4H-SiC epitaxial layer (epilayer) with a high growth rate [1,2]. In this paper, in order to evaluate the crystalline defects which can affect the characteristics of devices, we investigated the formation of variety of in-grown stacking faults (SFs) in detail. Synchrotron X-ray topography, photoluminescence (PL) and transmission electron microscopy are employed to analyze the SFs and the origins of the SF formation are discussed. The result in reducing in-grown SFs in fast epitaxial growth is also shown.

Abstract: This paper reports on recent advances in 4H-SiC epitaxial growth toward high-throughput production of high-quality and uniform 150 mm-diameter 4H-SiC epilayers by enhancing of growth rates, improving uniformity and reducing defect densities. A vertical single-wafer type SiC epitaxial reactor is employed and high-speed wafer rotation is confirmed as effective, not only for enhancing growth rates without increasing the source gas supply but also improving thickness and doping uniformities. The current levels of reducing particle-induced defects, in-grown stacking faults, basal plane dislocations and the Z_1/2 center (carbon vacancies) are reviewed.

Abstract: In this report we were able to successfully identify and localize in 3D 3C and 6H foreign polytypes and stress in the embedded epilayer by high resolution 3D Raman spectroscopy, that were otherwise invisible under the microscope or SEM, in non-contact and non-destructive way. Stripe patterned deep trenches with aspect ratio about 2 (depth=3.0μm; width=1.5μm) were formed on 4H-SiC substrate by ICP. The epitaxial layer was embedded in these trenches by SiC CVD. Poly type defects and stress in the embedded epilayer were mapped by curve-fitting of spectra obtained from Raman measurement of the embedded SiC epilayer. The location of the foreign polytypes and the stress inside the stripe pattern allows speculating on the origin of the defects and correlating it to the manufacturing process.

Abstract: The effects of high-speed wafer rotation for 4H-SiC epitaxy in newly developed 150 mm vertical reactor is investigated by simulation analysis. The simulation model shows a good agreement with experimental results. It is revealed that a combination of high-speed wafer rotation as high as 1000 rpm and relatively high system pressure of 267 mbar is effective to reducing boundary layer thickness above the 4H-SiC wafer, and greatly enhances the epitaxial growth rates. The growth rate increase ~2 times using the combination of high-speed wafer rotation and relatively high system pressure.

Abstract: Our latest results of SiC bulk growth by High-Temperature Gas Source Method　are given in this paper. Based on Mullins-Sekerka instability, optimal growth conditions to preclude dendrite crystals, which are one of the pending issues for high-speed bulk growth, was studied. First, the simulation studies showed that high temperature gradient in a growing crystal is required for high-speed bulk growth without dendrite crystals. Second, high-speed bulk growth was demonstrated under high temperature gradient.

Abstract: A single wafer type 150 mm vertical 4H-SiC epitaxial reactor with high-speed wafer rotation was developed. The rotation of the wafer at high speed significantly enhances the growth rate, and high growth rates of 40–50 μm/h are possible on 4°off-cut 4H-SiC substrates. In addition, a low defect density and smooth surface without macro step bunching can be achieved. Excellent uniformity of thickness and doping concentration was obtained for a 150 mm wafer at a high growth rate of 50 μm/h.