Papers by Author: Mina Ryo

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Abstract: Application of highly N-doped buffer layers or a (N+B)-doped buffer layer to PiN diodes to suppress the expansion of Shockley stacking faults (SSFs) from the epilayer/substrate interface was studied. These buffer layers showed very short minority carrier lifetimes of 30–200 ns at 250°C. The PiN diodes were fabricated with buffer layers of various thicknesses and were then tested under high current injection conditions of 600A/cm2. The thicker buffer layers with shorter minority carrier lifetimes demonstrated the suppression of SSFs expansion and thus that of diode degradation.
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Abstract: Cost of silicon carbide (SiC) wafer has been improved owing to the development of larger and higher quality wafer technologies, while the process stays long and complicated. In this paper, we propose a novel short process of ion implantation and provide the fabrication model SiC schottky barrier diodes (SiC-SBDs) devices. Currently common mask layer of ion implantation employs high heat resistant materials such as metal oxides. Because the ion is implanted to SiC wafer at high temperature between 300 °C and 800 °C due to avoid the damage of SiC crystal structure. The process using oxide layer tends to became long and complicated. On the other hand, our proposal process uses a heat resistant photoresist material as the mask instead of the oxide layer. The heat resistant photoresist is applied to newly developed SP-D1000 produced by Toray Industries, Inc.. We demonstrated to fabricate model SiC-SBDs devices based on our proposal process with SP-D1000 and confirmed the device working as same as a current process.
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Abstract: We successfully fabricated 13-kV, 20-A, 8 mm × 8 mm, drift-free 4H-SiC PiN diodes. The fabricated diodes exhibited breakdown voltages that exceeded 13 kV, a forward voltage drop of 4.9–5.3 V, and an on-resistance (RonAactive) of 12 mW·cm2. The blocking yield at 10 kV on a 3-in wafer exceeded 90%. We investigated failed devices using Candela defect maps and light-emission images and found that a few devices failed because of large defects on the chip. We also demonstrated that the fabricated diodes can be used in conducting high-voltage and high-current switching tests.
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Abstract: SiC power module with low loss and high reliability was developed by utilizing IEMOSFET and SBD. The IEMOSFET is the SiC MOSFET with high channel mobility in which the channel region is the p-type carbon-face epitaxial layer with low acceptor concentration. Elemental technologies for the high channel mobility and the high reliability of the gate oxide have been developed to realize the excellent characteristics by the IEMOSFET. The SBD was designed so as to minimize the forward voltage drops and the reverse leakage current. For the fabrication of these SiC power devices, the mass production technology such as gate oxidation, ion implantation and following activation annealing have been also developed.
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