Papers by Author: Muhammad Nawaz

Abstract: A theoretical design analysis using numerical two dimensional computer aided design tool (i.e., TCAD) is presented for a-Si/c-Si based heterojunction (HJ) solar cells. A set of optical beam propagation models, complex refractive index models and defect models for a-Si material implemented (in-built) in the simulation software are first evaluated for single (SHJ) and double heterojunction (DHJ) devices. Assessment is further carried out by varying physical parameters of the layer structures such as doping, thickness of the c-Si and a-Si layers, defect density in the a-Si layer and bandgap discontinuity parameter. With varying bandgap discontinuity and using standard transport model in numerical device simulation, HJ solar cell performance is undervalued (η = 19.5%). This is the result of poor photogenerated carrier collection due to the presence of heterojunction at the respective n and p-contacts of the device. Implementing thermionic field emission tunneling model at the heterojunction, we obtained improved performance (η = 24 %) over large range of bandgap discontinuities. Keeping improved efficiency of HJ cell, implementing a step graded a-Si layer, further helps to widen the range of bandgap discontinuity parameter.

Abstract: This paper reports large active area (15 mm2) 4H-SiC BJTs with a low VCESAT=0.6 V at IC=20 A (JC=133 A/cm2) and an open-base breakdown voltage BVCEO=2.3 kV at T=25 °C. The corresponding room temperature specific on-resistance RSP-ON=4.5 mΩcm2 is to the authors knowledge the lowest reported value for a large area SiC BJT blocking more than 2 kV. The on-state and blocking characteristics were analyzed by device simulation and found to be in good agreement with measurements. Fast switching with VCE rise- and fall-times in the range of 20-30 ns was demonstrated for a 6 A 1200 V rated SiC BJT. It was concluded that high dynamic base currents are essential for fast switching to charge the BJT parasitic base-collector capacitance. In addition, 10 μs short-circuit capability with VCE=800 V was shown for the 1200 V BJT.

Abstract: This paper addresses the performance of SiC NPN Bipolar Junction Transistors (BJTs) at high and low temperature. A current gain of 50 at room temperature was obtained which decreases to 25 at 275 oC. A maximum current gain (β) of 111 has been reported at -86 oC. At low temperature (below -86 oC), the current gain drops rapidly because of carrier freezout effect. At room temperature, a minimum on-resistance of 7 mΩ-cm2 was obtained. This increases to 28 mΩ-cm2 at 275 oC. The on-resistance of BJTs is approximately unaffected by lowering the temperature down to -86 oC from room temperature. Below -86 oC, the on-resistance jumps up rapidly because of carrier freezeout. Electrical performance of BJTs have been fairly stable during stress measurement at high temperature (120 hours at 100 oC ) at a collector bias of 1000V (with open base) for devices with a breakdown voltage of 1200V.The devices have been stressed further at low (i.e., 6) and high gain (i.e., 15) at room temperature. Initial degradation within first hour of stress test has been reported and then degradation stabilizes out. Packaged devices were tested up to 550 oC and performed admirably well up to that temperature.