Papers by Author: Satoshi Tanimoto

Abstract: A new SiC power module package structure is proposed that is capable of withstanding greater ΔTj cycle stress. Its most notable feature is the use of a SiN substrate having Cu/Invar/Cu foils (C/I/C thickness ratio of 1/8/1) brazed on both sides as conductor plates. The CIC foils show a very low coefficient of thermal expansion (CTE) of 5.1 ppm/°C and therefore can significantly reduce package degradation resulting from the larger CTE mismatch of the conductor to SiC and SiN. A thermal cycle test (TCT) was conducted between -40°C and 250°C (ΔTj = 290°C). It was found that the SiC/Au-Ge/CIC-SiN die attachment maintained joint strength of 78 MPa even after 3000 cycles.

Abstract: A forced-air-cooled three-phase inverter built with SiC-JFETs and -SBDs as power semi-conductor devices was designed and fabricated. The inverter can operate steadily at a rated power of 10 kW in a junction temperature range up to 200°C. Output power density of more than 20 kW/L was achieved. The design specifications, the power module fabrication process, the results of a high-temperature operating test and a continuous switching test are described in turn.

Abstract: There is still little consensus regarding why low contact resistivity is achieved when Ni on n-type 4H- and 6H-SiC is annealed at temperatures of more than above 950°C. The objective of this paper is to provide an answer concerning to this question. It is has been reported that even Ni-based contacts formed in the n++ region exhibited a steep reduction of contact resistivity in an annealing temperature range > 900°C. This effect reduction cannot be explained by the carbon vacancy induced donor model (Vc model) proposed by Han and his coworkers [Appl. Phys. Lett., Vol. 79, p. 1816 (2001)]. And, it is clarified that It was observed that the surface of substrates annealed at 1000°C was not covered with not Ni2Si but with a thin layer of NiSi. Finally, a plausible model is proposed that as the result of annealing at higher temperatures, results in the formation of the a NiSi/SiC system is builtat the substrate interface, resulting in significant reduction in low causing contact resistivity to be reduced significantly.

Abstract: It is strongly desired to operate SiC power devices at higher junction temperatures (Tj), but that often entails problems because they contain a variety of materials with thermal activity or weakness. An example of such troubles is the steep increase in resistance of the Al electrode in the source (or emitter) contact holes, caused by electromigration (EM). In this work, EM reliability of the contact hole in SiC power devices was evaluated for an improved Al electrode sandwiched between thin TaN layers. An estimated mean time to failure (MTTF) of approximately 3400 years was achieved under conditions of Tj = 300°C and J = 104 A/cm2.

Abstract: Proton conducting ZrO2－yP2O5 (y = 1.0, 1.2, 1.4. 1.6, 1.8) electrolytes based on a shell-core structure were synthesized with diammonium hydrogen phosphate by a solid state reaction, and their conductivities were investigated by ac-impedance spectroscopy. Among the ZrO2-yP2O5 compositions, ZrO2－1.6P2O5 showed the highest proton conductivity of 0.13 Scm-1 at 250°C. The conductivity increased with increasing P2O5 molar ratio and were significantly influenced by heat-treatments in the preparation process. Polytetraflouroethylene (PTFE) was also mixed into these electrolytes in order to improve the mechanical strength and long term durability.

Abstract: One major problem when operating SiC power devices at a junction temperature of more than 200°C is the pronounced degradation of the Ni2Si-based ohmic contacts caused by interaction with the Al interconnect. In this paper, measures against such trouble and their effectiveness are discussed. Two measures highly compatible with Si device technology have been devised and experimentally implemented: (1) insertion of a Ta/TaN barrier metal between the Al interconnect and the Ni2Si contacts; (2) use of 1 wt% Si-doped Al as the interconnect. A failure lifetime of more than 12000 hours has been attained in a temperature range up to 385°C.

Abstract: It was experimentally shown that an ONO gate dielectric carefully formed on 4H-SiC has extremely high reliability even under a negative electric field at least up to a junction temperature of 300°C, making it promising for power MOS and CMOS applications. Medium charge to failure of –30 C/cm2 was achieved for fully processed polycrystalline Si gate MONOS capacitors with an equivalent SiO2 thickness of teq = 44 nm and a 200-μm diameter. The medium time to failure of these capacitors projected for –3 MV/cm exceeds 86 and 6.3 thousand years at room temperature and 300°C, respectively. A parasitic memory action did not appear even when Eox of -6.6 MV/cm was applied for 5000 seconds.

Abstract: Shell-core type TiP2O7-based electrolytes were synthesized by a low-temperature sol-gel method, and their conductivities were investigated by ac-impedance spectroscopy. The samples heat-treated at 500°C showed higher proton conductivities of 3.8 × 10-2 - 1 × 10-2 Scm-1 at intermediate temperatures (100 - 300°C). The conductivity decreased by reheat-treatments at 600°C and 700°C due to a decrease in the amount of the conductive amorphous shells. However, the mechanical strength of the sample pellet significantly increased by the reheat-treatment. The sample reheat-treated at 600°C kept high conductivities of 8.8 × 10-3 - 1 × 10-3 Scm-1 in a range of 100°C - 300°C.

Abstract: This paper discusses critical reliability issues and their countermeasures for vertically structured poly-Si gate n-channel power MOSFETs (DMOS) on 4H-SiC when operated at an elevated temperature of more than 300°C for a long period of time. Two destructive failures were identified in a storage life test at 500°C: a short-circuit between the source and the gate and a disconnection at the n+ source contact. The former was caused by interlayer dielectric erosion and/or Al spearing into the poly-Si gate; the latter was caused by the disappearance of the NiSix contact layer. Effective and practical countermeasures were devised and implemented. Device lifetime against the three different failure mechanisms was improved in every case by at least one order of magnitude.

Abstract: In this work, it was clarified that many dislocations present on the substrate surface markedly deteriorated the TDDB property of thermal gate oxide on commercially purchased 4H-SiC epitaxial substrates. However, it was also experimentally shown that even after removing all of the dislocations, there was still a significant difference in the charge-to-breakdown (QBD) value between thermal oxides on SiC and on Si. It was suggested that this difference might partly originate from the intrinsic physics. The ONO gate dielectric was shown to be a promising alternative to thermal oxide. Experimental results indicate that the ONO dielectric on 4H-SiC could achieve a higher QBD value than thermal oxide on Si. A value of QBD = 408 C/cm2 was achieved for an ONO gate dielectric, with a SiO2 equivalent thickness of 40 nm, on regular 4H-SiC.