Papers by Author: Stefano Cristiani

Abstract: An inductively heated furnace and an ultra-fast microwave heating system have been used for performing post implantation annealing processes of P+ implanted semi-insulating <0001> 4H SiC at 1800-1950°C for 5 min and 2000-2050°C for 30 s, respectively. Very high P+ implantation fluences in the range 71019 81020 cm-3 have been studied. The annealing processes in the inductive furnace and the one at the lower temperature in the microwave furnace show a saturation in the efficiency of the electrical activation of the implanted P+ that is bypassed by the microwave annealing process at the higher temperature. The measured electron mobility values versus electron density are elevated in all the studied samples and for every post implantation annealing process. This has been ascribed to an elevated implanted crystal recovery due to the very high annealing temperatures > 1800°C.

Abstract: Phosphorous implanted n+/p diodes have been included in the masks for manufacturing n-MOSFET devices and processed in the same way of source/drain regions. The diode junctions were made by a P+ implantation at 300°C and a post implantation annealing at 1300°C. The diode emitter area was protected by 0.6 m thick CVD oxide during the processing of the MOSFET gate oxide. Three gate oxide processes were taken into account: two of them include a N implantation before a wet oxidation, while the third one was a standard oxidation. Considering the effect on the n+/p diodes, the main difference among the processes were the wet thermal oxidation time that ranged between 180 and 480 min at a temperature of 1100°C. The diode current-voltage characteristics show similar forward but different reverse curves in the temperature range of 25-290°C. Differences in reverse bias voltage as a function of the measurement temperature have been analyzed and are related to the different gate oxidation time. A correlation between the shortest oxidation time and the lower leakage current is presented.

Abstract: We report investigations on the fabrication and electrical characterization in the range 27°C -290 °C of normally off 4H-SiC circular MOSFET devices manufactured on p-type semiconductor. An high quality SiO2/SiC interface is obtained by nitrogen ion implantation conducted before the thermal oxidation of SiC. Two samples with different nitrogen concentration at the SiO2/SiC interface and one un-implanted have been manufactured. The sample with the highest N concentration at the interface presents the highest channel mobility and the lowest threshold voltage. With increasing temperature, in all the samples the threshold voltage decreases and the electron channel mobility increases, reaching the maximum value of about 40 cm2/Vs at 290 °C for the sample with the highest N concentration. The observed improvement of the mobility is related to the beneficial effect of the N presence at the SiO2/SiC interface, which leads to the reduction of the interface trap density with energy close to the conduction band. Our results demonstrate that N implantation can effectively be used to improve the electrical performance of surface n-channel 4H-SiC MOSFETs.

Abstract: 4H-SiC p-type MOS capacitors fabricated by wet oxidation of SiC preamorphized by nitrogen ion (N+) implantation have been investigated. The oxidation rate of the SiC layer preamorphized by high-dose N+ was much larger than that of crystalline SiC, allowing us to reduce the fabrication time of SiC MOS devices. We found that the presence of the surface amorphous SiC layer before the oxidation process did not influence the interface state density in MOS capacitors. Moreover, the shift of the flat-band voltage is not correlated to the amount of nitrogen in the oxide. On the contrary the density of interface states near the valence band edge increased according with the high concentration of the implanted N at the oxide–SiC interface, as in the case of dry oxidation reported by Ciobanu et al. The generation of positive charges due to the nitrogen embedded inside the oxide layer was smaller compared with dry oxidation. We discuss the difference between wet and dry oxidation for MOS capacitors fabricated with N+ implantation.