Papers by Keyword: Capacitance-Voltage Characteristics

Abstract: The effect of high-temperature electron and proton irradiation on SiC-based device characteristics is being investigated. Industrial integrated 4H-SiC Schottky diodes, each with an n-type base and a blocking voltage of either 600 V, 1200 V, or 1700 V, manufactured by Wolfspeed, are being studied. 0.9 MeV electron and 15 MeV proton irradiation were applied. It has been found that the irradiation resistance of silicon carbide Schottky diodes at high temperatures significantly exceeds their resistance at room temperature. This effect is attributed to the annealing of compensating defects induced by high-temperature irradiation. The parameters of radiation-induced defects are determined using the method of deep level transient spectroscopy (DLTS). Under high-temperature ("hot") irradiation, the spectrum of radiation-induced defects introduced into SiC appears to differ significantly from the spectrum of defects introduced at room temperature. It is suggested that approximately half of the compensation is due to radiation-induced defects formed in the bottom part of the bandgap.

Abstract: I-V, C-V characteristics and current change kinetics of the Ni-TiO_x-p/Si-Ni heterojunction were studied under different speeds of voltage sweep, in darkness and under illumination of various spectral regions. It was found that Ni-TiO_x-p/Si-Ni heterojunction shows pronounced hysteretic behavior and can act as memristor cell. Results of studies of photosensitivity and current kinetics under abrupt changes of applied voltage and illumination reveal considerable role of surface states recharging in TiO_x oxide layer or at TiO_x-p/Si interface in the switching effects.The studied Ni-TiO_x-p/Si-Ni heterostructure is prospective as a basis for low-cost, CMOS- and SOI-compatible microelectronic devices with non-volatile memory.

Abstract: ZnO:Al/p-Si heterojunctions were fabricated by sol-gel dip coating technique onto p-type Si wafer substrates. Capacitance-Voltage (C-V) characteristics of ZnO:Al/p-Si heterojunctions were determined after the ZnO:Al thin film coated Si wafers were annealed at 700 and 800°C, respectively. C-V results indicate an abrupt interface.

Abstract: We present the study of the growth of ZnO nanorods on p-Si (100) using MBE. Various characterization techniques such as Fourier transform infra-red (FTIR), scanning electron microscopy (SEM), atomic force microscopy (AFM), X-ray diffraction (XRD), Raman spectroscopy and capacitance – voltage (C-V) measurements were employed to analyze and assess the grown ZnO nanorods. AFM clearly demonstrated the growth of vertically aligned nanorods, however, they get diffused as the thickness of the layer is increased beyond 1 µm. C-V measurements in particular, justified p-n junction between Si/ZnO nanorods. The junction showed n-type conductivity with carrier concentration 1×10¹⁵ cm^-3. The source of this n-type conductivity was Zn-interstitials and the presence of Zn-interstitials was confirmed by EDAX and Raman spectroscopy. Experimental detail and results were presented that help in furtherance of our understanding of the material issues and its potential as required for the practical devices.

Abstract: 3C-SiC MOSFET with 200 cm2/Vs channel mobility was fabricated. High performance device processes were adopted, including room temperature implantation with resist mask, polysilicon-metal gates, aluminium interconnects with titanium and titanium nitride and a specially developed activation anneal at 1600°C in Ar to get a smooth 3C-SiC surface and hence the expected high channel mobility. CVD deposited oxide with post oxidation annealing was investigated to reduce unwanted oxide charges and hence to get a better gate oxide integrity compared to thermally grown oxides. 3C-SiC MOSFETs with 600 V blocking voltage and 10 A drain current were fabricated using the improved processes described above. The MOSFETs assembled with TO-220 PKG indicated specific on-resistances of 5 to 7 mΩcm2.