Papers by Keyword: Charge Carrier Lifetime

Abstract: The quality of the epitaxial layer plays an important role in the performance of modern power electronic devices. Minority carrier lifetime is known to be sensitive to defects like dislocations, stacking faults, and points defects. Therefore, in this work lifetime measurements by microwave detected photoconductivity decay are used to evaluate the quality of the epitaxial layer on various 4H-SiC substrates from different vendors. The stability of the measurement technique is shown by a daily release measurement. This allows for a reliable analysis of almost 300 typical 1,200 V epilayer stacks. It has been shown that the effective lifetime of these samples can be separated into two different ranges. The lifetime values of about 120 ns fit to theoretical calculations. The cause for the increased lifetime of about 250 ns in the second range has yet to be determined in further research. Furthermore, the lifetime maps were used to locate defects in the surface near regions.

Abstract: Key steps in the fabrication of high-efficiency a-Si:H/c-Si heterojunction solar cells are the controlled pyramid texturing of the c-Si substrates to minimize reflection losses and the subsequent passivation by deposition of a high-quality a-Si:H layer to reduce recombination losses. This contribution reviews our recent results on the optimization of the wet-chemical texturing of crystalline Si wafers for the preparation of heterojunction solar cells with respect to low reflection losses, low recombination losses and long minority carrier lifetimes. It is demonstrated, that by joint optimization of both saw damage etch and texture etch the optical and electronic properties of the resulting pyramid morphology can be controlled. Effective surface passivation and thus long minority charge carrier lifetimes are achieved by deposition of intrinsic amorphous Si ((i) a-Si:H) layers. It is shown, that optimized (i) a-Si:H deposition parameters for planar Si (111) wafers can be transferred to a-Si:H layer deposition on random pyramid textured Si (100) wafers. Statistical analysis of the pyramid size distribution revealed that a low fraction of small pyramids leads to longer minority charge carrier lifetimes and, thus, a higher V_oc potential for solar cells.